Flash Memory Erasing Method Using Sector Enable Signals
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Solution Overview
Problem
Conventional flash memory erasing methods face issues with leakage current from over-erased transistor memory cells, leading to operational failures and requiring additional flag registers and substantial verification time.
Innovation Solution
An erasing method for flash memory that divides memory blocks into sectors, using a sector enable signal to determine if under-erased cells exist, and injecting erasing shots accordingly, eliminating the need for additional flag registers and reducing verification time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional erasing methods verify and erase all transistor memory cells in a memory block, then complete erasure is achieved, but additional flag registers are required and verification time increases substantially
Solution Approach 1:
The memory block is divided into multiple memory sectors, each with its own sector enable signal. This segmentation allows the verification and erasing process to focus only on specific sectors that contain under-erased cells, rather than verifying the entire memory block, thereby reducing verification time while maintaining erasure completeness.
Solution Approach 2:
The patent applies different verification and erasing operations to different memory sectors based on their specific erasure status. By using sector enable signals to identify and target only the sectors containing under-erased cells, the system applies local quality control to reduce overall verification time while ensuring complete erasure where needed.
2Reliability
If over-erased correction is performed on all transistor memory cells, then leakage current issues are prevented, but correction time increases for slower erased cells
Solution Approach 1:
The memory block is divided into multiple memory sectors, each with its own sector enable signal. This segmentation allows the verification and erasing process to focus only on specific sectors that contain under-erased cells, rather than verifying the entire memory block, thereby reducing verification time while maintaining erasure completeness.
Solution Approach 2:
The patent applies different verification and erasing operations to different memory sectors based on their specific erasure status. By using sector enable signals to identify and target only the sectors containing under-erased cells, the system applies local quality control to reduce overall verification time while ensuring complete erasure where needed.
3Device complexity
If the erasing unit is one memory block, then erasure process is simplified, but bit line leakage current affects more cells and increases over-erased correction times
Solution Approach 1:
The memory block is divided into multiple memory sectors, each with its own sector enable signal. This segmentation allows the verification and erasing process to focus only on specific sectors that contain under-erased cells, rather than verifying the entire memory block, thereby reducing verification time while maintaining erasure completeness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively erases transistor memory cells without additional flag registers and minimizes verification time, preventing operational failures by ensuring accurate cell state reading and reducing over-erased correction times.
Implementation Method 1
the memory management apparatus injects an erasing shot to the transistor memory cells of the memory block (i.e. erases the transistor memory cells of the memory block) at step S124, so as to change threshold voltages of the transistor memory cells in the memory block
Implementation Method 2
the undesirable effect of the leakage current from the over-erased transistor memory cells... If a substantial number of transistor memory cells on the bit line are drawing background leakage current, the total leakage current on the bit line may exceed the cell read current
Data Source
AI summary
An erasing method used in a flash memory comprising at least one memory block divided into a plurality of memory sectors is illustrated. Whether the memory block or the memory sector corresponding to an address has at least one under-erased transistor memory cell according to a sector enable signal is verified, wherein the sector enable signal is determined according to whether the memory block has at least one over-erased transistor memory cell. The transistor memory cells of the memory block or the memory sector will be erased according to the sector enable signal if the memory block or the memory sector corresponding to the address that has the under-erased transistor memory cell.