Flash Memory Sector Erase Auto-Resume Mechanism

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Solution Overview

Problem

Irregular stoppages during sector erase processes in flash memory devices can lead to indeterminate states, causing read/verify errors and unreliable detection of blank sectors, consuming many clock cycles in existing solutions.

Innovation Solution

A method that stores information about the last sub-stage of the sector erasure process before an irregular stoppage occurred, allowing the erasure process to resume from that stage upon Power on Reset, using a dedicated memory location to track the sector address and erasure status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If file system software monitors all sub-stages to verify successful completion, then data integrity is improved, but system complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A dedicated memory location acts as an intermediary to store the last completed sub-stage information. This mediator allows the system to track erase progress without complex monitoring software, resolving the contradiction by introducing a simple hardware-based tracking mechanism that maintains data integrity while reducing system complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory device performs self-diagnosis and self-recovery by automatically detecting irregular stoppages through the stored sub-stage information and initiating restart procedures without external intervention. This self-service approach maintains reliability while simplifying the overall system architecture

Inventive Principle:
Principle #25Self-service

2Reliability

If the system performs consistency check of all storage sectors during power up, then detection of interrupted erase is improved, but time consumption increases

Engineering Contradiction:
Improvedetection of interrupted eraseVSAvoidtime consumption
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary tracking of the last completed sub-stage during the erase process itself, storing this information in a dedicated memory location before any potential interruption occurs. This preliminary action enables immediate detection of irregular stoppages upon power-up without requiring time-consuming consistency checks of all sectors

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention extracts only the critical information (last completed sub-stage) from the entire erase process and stores it separately in a dedicated memory location. This extraction allows rapid detection of interruptions without the need to examine all storage sectors, significantly reducing time consumption while maintaining reliable detection

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If the system restarts sector erase upon detection of indeterminate state, then data integrity is improved, but clock cycle consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidclock cycle consumption
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system preliminarily stores the last completed sub-stage information during the erase process, enabling immediate identification of where to resume without restarting from the beginning. This preliminary tracking reduces clock cycle consumption by avoiding redundant erase operations while maintaining data integrity through precise recovery

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dedicated memory location providing last completed sub-stage information acts as a feedback mechanism that guides the restart process. This feedback enables the system to resume erasure at the correct point rather than restarting entirely, improving data integrity while minimizing clock cycle consumption

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9373405B2Auto resume of irregular erase stoppage of a memory sector
Publication Date: 2016.06.21 INFINEON TECHNOLOGIES LLC
  • US9373405B2 patent drawing
  • US9373405B2 patent drawing
  • US9373405B2 patent drawing

AI summary

Disclosed herein are system, method and/or computer program product embodiments for automatically resuming an irregular erasure stoppage in a sector of a memory system. An embodiment includes storing information related to any completed sub-stage of a multi stage erasure process and the corresponding memory sector address in a dedicated memory. After an irregular erasure stoppage occurs, an embodiment reads the information from the dedicated memory and resumes the erasure process of the memory sector from the last sub-stage completed.