Flash Memory Control Device Segmentation for Reprogramming Cycles
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memories can only be reprogrammed a limited number of times, making them less suitable for applications requiring frequent data rewriting, and existing EEPROM emulation techniques do not effectively manage address architecture or ensure data consistency during power failures.
Innovation Solution
A memory control method and device that groups write cells, manages address architecture, and ensures atomic writing of data segments, allowing for increased reprogramming cycles by erasing groups of cells rather than individual cells and using reference data to recover from power failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If flash memory is used as an alternative to EEPROM, then cost is reduced, but the number of reprogramming cycles is insufficient
Solution Approach 1:
The memory address space is segmented into multiple write cells, each capable of independent write operations. This segmentation allows the system to track and manage write cycles at the individual cell level rather than treating the entire memory as a single unit, thereby extending the overall reprogramming capacity of the flash memory to match EEPROM durability requirements
Solution Approach 2:
The system changes the operational parameters by implementing a write cell management mechanism that tracks write cycle counts for each cell and dynamically selects appropriate cells for new writes based on their remaining cycle capacity. This parameter-based management transforms flash memory's limited write cycles into a resource that can be distributed and extended across multiple cells
2Duration of action of stationary object
If write cells are divided into multiple blocks for EEPROM emulation, then reprogramming cycles are increased, but data consistency becomes difficult to determine after power failure
Solution Approach 1:
Before performing write operations across multiple blocks, the system preliminarily establishes a consistent state by setting reference data that represents the expected final state. This preliminary action creates a baseline that allows verification of data consistency after power failure, ensuring that either all blocks are successfully updated or the reference data indicates the pre-write state
Solution Approach 2:
The system implements feedback mechanisms by storing reference data that reflects the current state of write cells. After power failure or interruption, the system reads and compares this reference data to determine which blocks were successfully written and which need to be re-written, providing feedback that guides the recovery process and ensures data consistency
3Reliability
If reference data is stored for each block to ensure data consistency, then data integrity is improved, but processing complexity increases
Solution Approach 1:
Instead of implementing complex verification algorithms, the system creates simple copies of the pre-write state as reference data stored in dedicated reference blocks. This copying approach preserves data integrity information in a straightforward manner that can be easily read and compared without requiring complex processing logic
Solution Approach 2:
The reference data structure serves multiple functions: it records the pre-write state for consistency verification, identifies which blocks need re-writing after power failure, and provides a baseline for determining successful write completion. This multi-functionality reduces the need for separate processing mechanisms for each purpose
Data Source
AI summary
To increase the number of times data can be written into a flash memory a flash memory is provided with a real data block having multiple data blocks each having multiple data write cells. A memory control device identifies a data block having a reprogrammable write cell out of the data block, successively adding received, new data segments into the reprogrammable write cell of the identified data block to complete addition of the data segments. The block in a state before the addition is kept to a certain period of time and then erased in the unit of block. When the number of write operations in the data block reaches a predetermined number of times, then it selects new data blocks that are necessary for retaining a subsequent predetermined number of operations to rewrite data, and repeats the aforementioned operations for the selected data blocks.