Flash Memory Program Verify Using Segmented Voltage Ramps

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Solution Overview

Problem

The existing programming operations in flash memory devices are time-consuming due to the need for a ramped voltage signal that covers the entire threshold voltage range for each memory cell, creating a performance bottleneck in memory systems.

Innovation Solution

The programming verify operation is segmented into multiple ramped voltage signal segments, each covering a shorter voltage range, allowing for overlapping segments to efficiently verify threshold voltages and reduce programming time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a ramped voltage signal covers the entire threshold voltage range for each memory cell during program verify operation, then accurate verification of all memory cells is achieved, but the programming operation becomes time-consuming and creates a performance bottleneck

Engineering Contradiction:
Improveverification accuracyVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the threshold voltage range into multiple segments, with each segment covering a specific voltage range. Instead of applying one comprehensive ramped voltage signal across the entire voltage range, the system applies multiple segmented ramped voltage signals, each targeting a specific segment. This segmentation allows parallel verification of different voltage ranges, significantly reducing the total programming time while maintaining verification accuracy for all memory cells.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple programming pulses are applied to program memory cells, then data storage capability is improved, but the cumulative programming time increases significantly

Engineering Contradiction:
Improvedata storage capabilityVSAvoidprogramming duration
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent performs preliminary classification of memory cells into different segments based on their threshold voltage characteristics before applying programming pulses. By pre-organizing memory cells into segments and preparing corresponding segmented ramped voltage signals in advance, the system can efficiently verify each segment as it is programmed, rather than performing a single comprehensive verification after all programming pulses are applied. This preliminary organization enables overlapping programming and verification operations, reducing the cumulative programming time.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the ramped voltage signal starts from the lowest threshold voltage and increases to the highest, then all possible threshold voltages are covered, but the verification time for each programming pulse increases

Engineering Contradiction:
Improvethreshold voltage coverageVSAvoidverification speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent transforms the single-dimensional verification approach (one ramped voltage signal covering the entire voltage range) into a multi-dimensional approach by introducing the segment dimension. Each segmented ramped voltage signal operates in its own voltage range dimension, allowing simultaneous verification across multiple voltage ranges. This dimensional transformation enables parallel processing of verification operations, dramatically increasing verification speed while maintaining complete threshold voltage coverage through the combination of all segments.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20120159277A1Methods for segmented programming and memory devices
Publication Date: 2012.06.21 MICRON TECHNOLOGY INC
  • US20120159277A1 patent drawing
  • US20120159277A1 patent drawing
  • US20120159277A1 patent drawing

AI summary

Methods for segmented programming, program verify, and memory devices are disclosed. One such method for programming includes biasing memory cells with a programming voltage and program verifying the memory cells with a plurality of ramped voltage signal segments, wherein each ramped voltage signal segment has a different start voltage and a different end voltage than the other ramped voltage signal segments.