Flash Memory Select Line Floating State Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In flash memory devices with a 3-dimensional structure, the increased voltage of select lines due to capacitor coupling during erase operations can lead to abnormal threshold voltage variations, potentially causing errors.
Innovation Solution
A semiconductor device with a memory block that includes a memory string electrically coupled between a bit line and a common source line, featuring source select transistors and memory cells responsive to operating voltages on select lines and word lines, along with an operation circuit that applies a source voltage for erase operations and controls the floating states of select lines and word lines to manage voltage increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high erase voltage is applied to the vertical channel during erase operation, then the memory cell can be effectively erased, but the voltage of select lines and dummy word lines increases abnormally due to capacitor coupling, causing threshold voltage shifts and errors
Solution Approach 1:
The operation circuit sets select lines to floating state before applying the high erase voltage to the vertical channel. This preliminary action prevents the capacitor coupling effect from causing abnormal voltage increases on select lines during the erase operation, thereby eliminating the harmful effect while maintaining effective memory cell erasure
2Reliability
If select lines are set to floating state before applying erase voltage, then abnormal threshold voltage changes are suppressed, but the control sequence becomes more complex
Solution Approach 1:
The operation circuit changes the voltage state parameter of select lines from grounded state to floating state at a specific timing before applying the high erase voltage. This parameter change prevents the capacitor coupling effect from causing abnormal threshold voltage shifts, achieving threshold voltage stability with a relatively simple control mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution minimizes voltage variations of select lines, thereby suppressing abnormal threshold voltage changes and enhancing the reliability of flash memory devices.
Implementation Method 1
When a high erase voltage is applied to the vertical channel, voltages of the select lines and the dummy word lines in a floating state are increased by a capacitor coupling phenomenon
Data Source
AI summary
The semiconductor device may include a memory block including a memory string electrically coupled between a bit line and a common source line, the memory string including source select transistors and memory cells configured to operate in response to operating voltages applied to select lines and word lines coupled to the memory cells and the source select transistors. The semiconductor device may include an operation circuit configured to apply a source voltage to the common source line for an erase operation, and to control floating states of the select lines and the word lines. The operation circuit may be configured to set the select lines to a floating state after the source voltage starts to increase from a precharge level to an erase level.