Floating Gate Flash Memory Selective Sector Erasure
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Solution Overview
Problem
Conventional floating gate flash memories require all memory cells in a p well to be erased and rewritten as a single sector, leading to inefficiency and inconvenience due to insulation layer limitations, causing data disturbance and misreading issues.
Innovation Solution
A method that allows selective erasure and rewriting of memory cells by randomly selecting and refreshing one word line within a p well, reducing the need for full sector erasure and minimizing data misreading by maintaining threshold voltage above the reference level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory cells in a same p well are divided into different sectors, then data organization flexibility is improved, but data disturbance and misreading occur due to electrical relationship between cells
Solution Approach 1:
The patent segments the memory block into multiple independent sectors within the same p well by introducing insulation layers. Each sector can be independently erased and programmed without affecting other sectors, enabling flexible data organization while preventing data disturbance between sectors. The insulation layer physically isolates the electrical fields of adjacent sectors.
Solution Approach 2:
The patent extracts the electrical interference problem by removing the shared electrical environment between sectors through insulation layers. By taking out the harmful electrical coupling effect and replacing it with physical isolation, the patent enables sector division while maintaining data integrity in each isolated sector.
2Reliability
If all memory cells in a p well are erased and rewritten as a single sector, then data integrity is maintained, but operation time and efficiency deteriorate
Solution Approach 1:
The patent divides the large single sector into multiple smaller sectors, allowing selective erasure and programming of only the necessary sectors. When data changes are needed, only the affected sector is erased and rewritten rather than the entire 64K byte memory block, dramatically reducing operation time while maintaining data integrity through the insulation layer isolation.
Solution Approach 2:
Instead of erasing and rewriting all memory cells in the p well (excessive action), the patent performs erasure and rewriting only on the specific sector that requires data changes (partial action). This selective approach significantly reduces the number of operations required while ensuring data integrity is maintained in the modified sector.
3Reliability
If insulation layers are disposed around p well to insulate memory cells, then sector isolation is improved, but memory efficiency deteriorates due to reduced usable area
Solution Approach 1:
The patent introduces insulation layers in the vertical dimension (between layers) rather than only in the horizontal plane. This three-dimensional isolation approach allows sectors to be closely packed in the planar view while maintaining electrical isolation through the insulating layers, thereby improving memory efficiency without compromising sector isolation.
Solution Approach 2:
The patent uses thin insulating films/layers to achieve sector isolation. These thin film insulation layers provide effective electrical isolation between sectors while occupying minimal space, allowing maximum memory cell density and efficiency within the p well structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the size of sectors within a p well, enabling multiple sectors to be designed, thereby enhancing data integrity and efficiency by minimizing unnecessary erasure and rewriting operations.
Implementation Method 1
floating gate flash memory
Implementation Method 2
reading data of a second set of memory cells
Data Source
AI summary
A method for erasing data stored in the memory cells of the floating gate flash memory is included. The method allows a plurality of sectors to be disposed in a same P well. The method includes erasing data stored in a first set of memory cells according to a control signal, randomly reading the data stored in a second set of memory cells affected by the erasing action of the first set of memory cells, and writing data read from the second set of memory cells onto the second set of memory cells.