Flash Memory Erase Control for Shared-Well Data Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face data loss issues due to unintended voltage changes in unselected memory regions sharing the same well during the erase operation, leading to incorrect data interpretation.
Innovation Solution
Implementing an error correction code algorithm to selectively program and correct memory regions affected by the erase operation, ensuring accurate data retention by adjusting threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the first memory region is erased, then data storage capacity is improved, but unintended voltage changes occur in the second memory region sharing the same well causing data loss
Solution Approach 1:
The memory array is divided into multiple memory regions (first memory region and second memory region) that share the same well. By segmenting the erasure operation to target only the first memory region while protecting the second, the patent enables selective data retention. The segmentation allows independent control of erasure operations on different regions within the same physical well structure.
Solution Approach 2:
Before erasing the first memory region, the patent performs preliminary actions including: (1) reading data from the second memory region, (2) generating error correction codes for the second memory region, and (3) programming the error correction codes into the second memory region. These preliminary actions prepare the second memory region to withstand the voltage changes caused by erasing the first region, preventing data loss.
2Measurement precision
If error correction code algorithm is applied to the second memory region, then data accuracy is improved, but processing complexity increases
Solution Approach 1:
The error correction code algorithm is applied selectively only to the second memory region that shares the same well with the first memory region being erased. This local application of error correction ensures data accuracy where needed (in the second region) without unnecessarily processing the entire memory array, thus balancing data accuracy requirements with processing efficiency.
Data Source
AI summary
An erasing method of a memory device is provided. The memory device includes a memory controller and a memory array having a first memory region and a second memory region. The first memory region and the second memory region share the same well. The erasing method comprising steps of: erasing the first memory region; and selectively programming the second memory region according to an error correction code algorithm.