Flash Memory Error Correction Using Concatenated Short Codewords
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Solution Overview
Problem
Conventional encoding methods are not well-suited for supporting high code rates in flash memory devices, leading to complex and costly implementations, especially in NAND flash memory systems where long codewords result in high hardware costs and performance impacts due to increased read and write throughput requirements.
Innovation Solution
The implementation of a codeword concatenation scheme that combines multiple short codewords to generate a long codeword, utilizing half-folded product codes and decoding methods like partial, successive, and joint decoding to achieve high error correction reliability with low implementation complexity, optimizing read performance and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional encoding methods use long codewords to achieve high code rates, then error correction capability is improved, but device complexity and implementation cost increase
Solution Approach 1:
The patent divides a long codeword into multiple shorter codeword segments. Each segment is encoded and decoded independently using simplified decoders, avoiding the need for complex long-codeword decoders while maintaining overall error correction capability through the segmented structure.
Solution Approach 2:
Multiple short codeword segments are concatenated to form a long codeword structure. The individual short codewords work together to provide the error correction capabilities of a long codeword, combining simplicity of short codes with the effectiveness of long codes.
2Reliability
If long codewords are used to support high code rates, then error correction reliability is improved, but read and write throughput requirements increase
Solution Approach 1:
By segmenting the long codeword into shorter independent segments, the patent enables parallel processing of multiple segments during read and write operations. This segmentation reduces the computational burden per segment and allows for more efficient throughput management.
Solution Approach 2:
The patent applies partial decoding strategies where not all codeword segments need to be fully decoded in every operation. This selective approach reduces the overall processing requirements while maintaining sufficient error correction reliability for the data being accessed.
3Adaptability or versatility
If conventional LDPC codes with high code rates are used, then coding efficiency is improved, but code length becomes considerably long
Solution Approach 1:
The patent segments the code structure into multiple short codewords instead of using a single long codeword. This segmentation maintains the desired code rate flexibility while keeping individual code lengths short, avoiding the considerably long code lengths associated with conventional high-rate LDPC codes.
Solution Approach 2:
The patent changes the fundamental parameter of code length by using multiple short codes rather than one long code. This parameter change allows achieving high code rates through the combination of multiple short segments rather than relying on extended long codeword structures.
Data Source
AI summary
Various implementations described herein relate to systems and methods for encoding and decoding data having input payload stored in a non-volatile storage device, including encoding the input payload by concatenating a plurality of short codewords to generate a plurality of encoded short codewords, and decoding the plurality of encoded short codewords to obtain the data, where each of the plurality of short codewords corresponding to a portion of the input payload.