Flash Memory Single Well Layout Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flash memory technologies face challenges in reducing layout area and preventing threshold voltage changes in memory cells, particularly when multiple memory blocks are formed on a single well, and in facilitating memory adjustment without requiring re-layout of peripheral circuitry.
Innovation Solution
A nonvolatile semiconductor memory device with a single well hosting multiple memory blocks, featuring an erase circuit that applies distinct voltages to word lines and wells to prevent threshold voltage changes and allow for flexible memory adjustment by sequentially arranging memory blocks and decoders to minimize the need for re-layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple memory blocks are formed on a single well, then layout area is reduced, but threshold voltage of memory cells changes due to voltage rise between word line and well
Solution Approach 1:
The invention segments the memory blocks into two groups: memory blocks to be erased and memory blocks to be maintained. By applying different voltage control strategies to each group, the patent resolves the conflict between using a single well (for area reduction) and maintaining threshold voltage stability (for reliability). Specifically, for memory blocks to be maintained, the word line voltage is kept equal to the well voltage, preventing threshold voltage changes while still utilizing the space-efficient single-well structure.
Solution Approach 2:
Different voltage control conditions are applied to different regions (memory blocks) within the same well structure. Memory blocks designated for erasure receive different voltage treatment compared to memory blocks designated for maintenance. This local differentiation allows the system to achieve both area efficiency through single-well integration and reliability through targeted voltage control that prevents unwanted threshold voltage shifts in non-erased blocks.
2Reliability
If each memory block is formed on an independent well, then threshold voltage stability is maintained, but layout area increases due to separation regions
Solution Approach 1:
The invention merges multiple memory blocks onto a single well structure, eliminating the need for separation regions between wells and thereby reducing layout area. To maintain threshold voltage stability despite this merging, the patent implements selective voltage control where the word line voltage is kept equal to the well voltage for memory blocks that should not be erased, effectively combining the space efficiency of a single well with the reliability of independent voltage control.
3Adaptability or versatility
If memory blocks are sequentially arranged to facilitate adjustment, then adaptability is improved, but device complexity increases due to additional drive circuits
Solution Approach 1:
The drive circuits are designed with multi-functionality to handle both erasure and maintenance operations for different memory blocks. The first and second drive circuits can selectively apply appropriate voltages to word lines and wells based on which memory blocks are designated for erasure versus maintenance. This universal design allows the same circuitry to adapt to different memory configuration requirements without requiring separate dedicated circuits for each function, thereby improving adaptability while controlling complexity.
Data Source
AI summary
With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.