Flash Memory State Programming for SMT-Stable OS Data

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Solution Overview

Problem

The reliability of operating system (OS) data stored in flash memory is deteriorated due to the high-temperature surface mount technology (SMT) process, leading to changes in threshold voltage distributions and increased probability of error bits.

Innovation Solution

Implementing a ROM burst mode before the SMT process for SLC programming of OS data, followed by a ROM burst migration mode after the SMT process to migrate data to TLC programming, and adjusting state indexes to minimize word line interference and lateral charge loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-bit data is stored in flash memory cells, then storage capacity is improved, but reliability of OS data deteriorates due to threshold voltage distribution changes during SMT process

Engineering Contradiction:

Improvestorage capacityVSAvoidreliability of OS data

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the flash memory into different programming modes (SLC mode for OS data, TLC mode for general storage) and uses different memory cells for different purposes. This segmentation allows OS data to be stored with higher reliability while maintaining overall storage capacity through the TLC region.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary programming of OS data in SLC mode before the SMT process, and then performs a re-programming operation after the SMT process to restore the data. This preliminary action ensures that OS data is programmed in a state that is less susceptible to threshold voltage shifts during SMT, thereby maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If SMT process is performed to mount flash memory on printed circuit board, then ease of manufacture is improved, but reliability of stored data deteriorates due to high temperature effects

Engineering Contradiction:

Improveease of mountingVSAvoidreliability of OS data

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent performs the OS data programming operation before the SMT process and then performs a re-programming operation after the SMT process. This preliminary action ensures that the data is programmed in a state that is less susceptible to threshold voltage shifts during SMT, thereby maintaining reliability while allowing the SMT process to proceed.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses a re-programming operation after the SMT process to compensate for and cushion against the threshold voltage shifts that occur during the high-temperature SMT process. This beforehand cushioning ensures that the data integrity is maintained despite the adverse thermal effects.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If ROM burst mode is used for SLC programming before SMT process, then reliability of OS data is improved, but device complexity increases due to additional programming modes

Engineering Contradiction:

Improvereliability of OS dataVSAvoidcomplexity of programming modes

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a unified memory controller that supports multiple programming modes (SLC mode for high reliability OS data, TLC mode for general storage). This multi-functionality allows the same controller to handle different data types and reliability requirements without requiring separate controllers, thereby managing complexity while improving reliability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Productivity

If data migration from SLC to TLC programming is performed after SMT process, then write capacity is maximized, but loss of time increases due to additional migration operation

Engineering Contradiction:

Improvewrite capacityVSAvoidtime for data migration

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent performs the OS data programming operation before the SMT process, so that the data is already in place and does not require migration after the SMT process. This preliminary action eliminates the need for post-SMT migration of OS data, thereby maximizing write capacity while minimizing time loss.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the memory into OS data storage region (SLC mode) and general storage region (TLC mode). This segmentation allows OS data to be programmed directly without migration, while other data can use the TLC region. The segmentation enables parallel operations and reduces the time required for data migration when needed.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP4379719B1Storage device and method for operating the same

Publication Date: 2026.04.22 SAMSUNG ELECTRONICS CO LTD

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AI summary

A storage device and the operating method thereof are provided. The method of operating the storage device for programming data into a flash memory before a surface mount technology (SMT) process includes: comparing (S221) program states of first memory cells connected to a first word line with program states of second memory cells connected to a second word line; changing (S222) the program states of the second memory cells according to a result of the comparing; and multi-bit programming (S223) the data and changed state information into the second memory cells.