Flash Memory Soft Bit Generation via Multi-Reference Voltage Readings

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Solution Overview

Problem

Existing flash memory devices designed for reading only hard bits lack the capability to efficiently generate soft bits for enhanced error correction without substantial modification, which complicates the internal structure and reduces silicon utilization.

Innovation Solution

A method that involves setting and resetting reference voltages in a flash memory device to read cell threshold voltages with higher resolution, using additional reference values to obtain soft bits without modifying the device's internal structure, allowing for enhanced error correction through additional data readings using standard read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional reference voltages and logic circuitry are added to generate soft bits, then error correction capability is improved, but device complexity and silicon area increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses standard read operations to create multiple copies of the same physical state data, each read with different reference voltage settings. These copies provide different perspectives on the same cell state, enabling soft bit generation without adding dedicated soft bit read circuitry. The controller processes these copied readings to derive reliability information.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the reference voltage parameter during standard read operations to generate different hardness values from the same physical state. By varying the reference voltage threshold, the same cell produces different read outcomes that, when combined, provide soft bit information. This approach extracts additional information from existing circuitry by changing operational parameters rather than adding hardware.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional reference voltages and logic circuitry are added to generate soft bits, then error correction capability is improved, but silicon area increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidsilicon area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent makes the existing read circuitry universal by configuring it to perform both hard bit reading and soft bit generation through parameter adjustment. The same read circuit that normally reads data bits is reused multiple times with different reference voltage settings to generate additional reliability information. This multi-functionality eliminates the need for dedicated soft bit read circuitry, saving silicon area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent generates soft bits by creating multiple copies of the physical state reading under different reference voltage conditions. Instead of building specialized hardware, the system takes copies of the same data using standard read operations with varied parameters, then processes these copies to derive soft bit information. This approach uses computational resources rather than additional hardware resources.

Inventive Principle:
Principle #26Copying

3Device complexity

If standard read operations are used with different reference voltages, then soft bits are generated without modifying device structure, but additional read operations increase time consumption

Engineering Contradiction:
Improvedevice structure simplicityVSAvoidreading time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by conducting multiple read operations with different reference voltages before the actual data processing stage. These preliminary readings gather all necessary information about the physical state from multiple perspectives, allowing the controller to comprehensively evaluate cell reliability and generate accurate soft bits before error correction processing begins.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses periodic read operations with systematically varied reference voltages to gather soft bit information. Instead of continuous monitoring, the system performs discrete, periodic reads at different reference voltage levels, which efficiently captures the necessary reliability information while minimizing total reading time compared to continuous measurement approaches.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8059463B2Method for generating soft bits in flash memories
Publication Date: 2011.11.15 SANDISK ISRAEL LTD
  • US8059463B2 patent drawing
  • US8059463B2 patent drawing
  • US8059463B2 patent drawing

AI summary

Information stored as physical states of cells of a memory is read first by setting each of one or more references to a respective member of a first set of values and reading the physical states of the cells relative to the values of the first set. Subsequently, the references are set to respective members of a second set of values, and the physical states of the cells are read again relative to the values of the second set. The second set is different from the first set, so that the two readings together read the physical states of the cells with higher resolution than the first reading alone.