Flash Memory Soft-Information Compression for LDPC Decoding

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Solution Overview

Problem

Existing flash memory devices face challenges with increased bit error rates in multi-level cell (MLC) and quad-level cell (QLC) flash memories, leading to performance issues due to the need for low-density parity-check (LDPC) decoding methods that increase data transfer and affect access control efficiency.

Innovation Solution

A control method for flash memory controllers that sends a first read command, decodes initial readout information, and if decoding fails, sends a second read command with a compression mode indicator to obtain soft information, compressing it to reduce data transfer and perform soft decoding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC decoding method is used to decode data with higher bit error rate, then decoding capability is improved, but data transfer amount increases significantly affecting flash memory interface performance

Engineering Contradiction:
Improvedecoding capabilityVSAvoiddata transfer amount
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts only the essential soft information (sign bit and one soft bit) needed for LDPC decoding, discarding redundant data. This extraction approach provides enough decoding capability while significantly reducing the data transfer amount compared to transmitting all soft information bits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different quality levels to different parts of the soft information. Instead of uniformly transmitting all soft bits with equal precision, it transmits the sign bit and one soft bit with higher importance at full quality, while omitting less critical soft information, thereby optimizing the balance between decoding capability and data transfer volume.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If MLC flash memory is used to increase recording density, then storage capacity is improved, but bit error rate increases requiring more complex decoding

Engineering Contradiction:
Improverecording densityVSAvoidbit error rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies partial action by transmitting only the minimum necessary soft information (sign bit and one soft bit) rather than all soft information bits. This partial transmission is sufficient to handle the increased bit error rate of MLC flash memory through LDPC decoding, while avoiding the excessive data transfer that would result from transmitting complete soft information.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12189959B2Memory device with compressed soft information and associated control method
Publication Date: 2025.01.07 SILICON MOTION INC
  • US12189959B2 patent drawing
  • US12189959B2 patent drawing
  • US12189959B2 patent drawing

AI summary

The present invention provides a control method of the memory device. In the operation of the memory device, the soft information is compressed by a control circuit within the flash memory module, so that the second readout information including the compressed soft information transmitted by the flash memory module has much smaller data size. Therefore, the performance of the memory interface will not be affected due to the bandwidth occupied by the soft information transmission.