Flash Memory Soft-Decision Reading for Threshold Voltage Errors

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Solution Overview

Problem

Flash memory devices experience programming and read errors due to variations in threshold voltage distributions of memory cells, leading to inaccuracies in data retrieval.

Innovation Solution

Implementing a nonvolatile memory device with a memory cell array, a read and write circuit, and an error correcting unit that executes read operations multiple times to generate a read data symbol, and uses soft decision logic to correct errors based on patterns, thereby outputting an error-corrected symbol.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read operations are executed multiple times to correct errors, then reliability is improved, but loss of time increases

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidread operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing multiple read operations and error correction in advance before data is actually needed. The control logic pre-executes read operations at least twice, performs error detection and correction using the error correcting unit, and stores the corrected data ready for immediate retrieval. This eliminates the need for time-consuming re-reads when errors are detected, thus improving reliability while managing time loss through advance preparation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary error correcting unit that acts as a mediator between the memory cell array and the read and write circuit. This unit receives read data, performs error detection and correction using correction codes, and outputs corrected data. By placing this intermediary layer, the system can handle read errors efficiently without requiring multiple full read cycles, thus improving reliability while minimizing time loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If error correction is performed using multiple read operations, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidcontrol logic complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the error correction function into distinct modular components: a control logic unit that manages read operations, an error detecting unit that identifies errors, and an error correcting unit that applies correction codes. This segmentation allows each component to perform its specific function independently, improving programming accuracy through systematic error handling while making the overall device complexity manageable through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback by using the results of first read operations to inform and adjust subsequent read operations and error correction processes. The control logic monitors read data, detects errors through the error detecting unit, and uses this feedback to trigger appropriate correction actions. This feedback mechanism improves programming accuracy by continuously refining the read process while maintaining controlled device complexity through systematic feedback loops.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20110093765A1Flash memory device and related programming method
Publication Date: 2011.04.21 SAMSUNG ELECTRONICS CO LTD
  • US20110093765A1 patent drawing
  • US20110093765A1 patent drawing
  • US20110093765A1 patent drawing

AI summary

A nonvolatile memory device comprises a memory cell array configured to store one or more bits per memory cell, a read and write circuit configured to access the memory cell array, a control logic component configured to control the read and write circuit to sequentially execute read operations of a selected memory cell at least twice to output a read data symbol, and an error correcting unit configured to correct an error in the read data symbol based on a pattern of the read data symbol to output an error-corrected symbol.