Flash Memory Product Stage Detection via Read Failure Count
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Solution Overview
Problem
The existing methods for recording data processing times in flash memory systems occupy processing time and reduce performance, while also consuming storage space.
Innovation Solution
A parameter calculation method and control method that utilize a first verification read voltage to determine the product stage of memory cells, allowing for the selection of corresponding processing parameters without recording data processing times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If data processing times are recorded to determine product stage, then processing parameter accuracy is improved, but processing time increases and storage space is consumed
Solution Approach 1:
The patent applies preliminary action by pre-establishing the correspondence between read failure counts and product stages during memory cell fabrication. Instead of recording actual data processing times during operation, the system pre-determines product stages based on initial read failure characteristics, allowing rapid parameter selection without time-consuming time tracking during subsequent operations.
Solution Approach 2:
The patent uses read failure count as a disposable indicator that can be quickly obtained and discarded. Rather than maintaining persistent records of data processing times, the system performs a quick read operation to obtain the failure count, uses it to determine product stage, and then discards this information, avoiding long-term storage requirements.
2Measurement precision
If data processing times are recorded to determine product stage, then processing parameter accuracy is improved, but storage space occupation increases
Solution Approach 1:
The patent uses read failure count as a disposable indicator that can be quickly obtained and discarded. Rather than maintaining persistent records of data processing times, the system performs a quick read operation to obtain the failure count, uses it to determine product stage, and then discards this information, avoiding long-term storage requirements.
Solution Approach 2:
The patent extracts the essential information needed for product stage determination (read failure count) from the complex data processing time recording process. By taking out only the critical metric of read failures rather than recording complete processing time histories, the system achieves accurate product stage determination with minimal storage space.
3Measurement precision
If verification read operations are performed on memory cells, then product stage determination accuracy is improved, but processing performance decreases
Solution Approach 1:
The patent uses first transistors as proxies or copies that reflect the state of memory cells without requiring direct verification reads on the actual data storage cells. By measuring read failure counts on these representative transistors, the system determines product stage with high accuracy while avoiding the performance penalty of repeated verification reads on productive storage cells.
Solution Approach 2:
The first transistors serve multiple functions: they act as both storage elements and as indicators for product stage determination. This multi-functionality allows the system to use the same hardware structure for both data storage and product stage assessment, eliminating the need for separate verification read operations and thus maintaining processing performance.
Data Source
AI summary
The present disclosure provides a control method, a parameter calculation method, a memory and a memory system. The memory includes a plurality of memory cells and a plurality of transistors. The plurality of memory cells correspond to the plurality of transistors. The control method includes: reading the plurality of transistors based on the verification read voltage to obtain the read failure count. Values of the read failure count correspond to different product stages of the memory. A first voltage is stored in the plurality of first transistors. The voltage value of the first voltage is equal to that of the verification read voltage. A product stage is associated with data processing times for multiple memory cells. A destination entry is selected from the plurality of entries according to the value of the read failure count.