Flash Memory Status Control via Data Bus Mapping
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Solution Overview
Problem
NAND flash memory controllers face challenges in managing a large number of NAND flash memory dies, leading to increased pad count and complexity, particularly in determining the ready/busy status of each die when shared R/B signal lines are used, which requires additional time and resources.
Innovation Solution
A control method utilizing an external data bus to map each port to a status index of multiple flash memory dies, allowing the host controller to issue setup and request commands, and transmit status indices through the data bus, eliminating the need for external R/B signal lines and pads by using DQ ports for status detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If independent R/B signal lines are provided for each flash memory die, then the ready/busy status of each die can be confirmed immediately, but the number of pads of the flash memory controller increases
Solution Approach 1:
The patent merges the R/B signal line function into the shared data bus by using specific data cycles (read status cycles) to transmit status information. Instead of having separate physical signal lines for each die, the status information is combined and transmitted through the existing data bus infrastructure, reducing pad requirements while maintaining status monitoring capability.
Solution Approach 2:
The data bus is given multiple functions: it serves both as a data transmission medium and as a status indication medium. By utilizing the same physical bus for both data and status information, the patent eliminates the need for dedicated R/B signal lines, thereby reducing the number of pads required on the controller.
2Device complexity
If shared R/B signal line is used for all logic units, then the number of pads is reduced, but additional time is required to confirm which flash memory die is busy
Solution Approach 1:
The patent implements a feedback mechanism where each flash memory die places its status information (ready/busy state) onto the shared data bus in response to read status commands. The controller can then read this feedback information to determine which specific die is busy, enabling efficient status monitoring without requiring separate physical signal lines for each die.
3Loss of information
If read status command is issued to inquire about logical unit status on shared R/B signal line, then status information can be obtained, but additional time and commands are required
Solution Approach 1:
The patent prepares status information in advance by having each flash memory die continuously maintain its status ready for query on the data bus. When the controller needs status information, the die can immediately provide it during the next read status cycle without requiring additional command sequences or processing time, as the status is pre-positioned and readily accessible.
Data Source
AI summary
A control method for flash memory and a flash memory are provided. The control method for a flash memory, the flash memory including an external data bus to which flash memory dies are coupled. The control method includes: in a setup stage, under an operation mode of command input, issuing by a host controller a setup command, wherein the setup command includes mapping information that each port of the external data bus is mapped respectively to a status index of each flash memory die; and in a request stage, under the operation mode of command input, issuing by the host controller a request command to each flash memory die, and under the operation mode of data output, in response to the request command, transmitting status of the status index of each flash memory die to the host controller through each port of the external data bus respectively.