Flash Memory Step-Up Voltage Control for Write Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Highly integrated flash memory devices face challenges in maintaining data reliability due to adjacent-cell interference, which increases threshold voltage distribution width and affects write time, requiring a method to reduce write time while preserving data reliability.

Innovation Solution

A non-volatile semiconductor memory device that dynamically adjusts the step-up voltage based on the distribution width of threshold voltage distributions during the write operation, ensuring smaller distribution widths and faster write times by varying the step-up voltage according to the determined distribution width of intermediate or midpoint threshold voltage distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a smaller step-up width is used in the step-up operation to reduce threshold voltage distribution width, then data reliability is improved, but write time increases and performance is reduced

Engineering Contradiction:
Improvedata reliabilityVSAvoidwrite time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the step-up width adjustable rather than fixed. The step-up width is dynamically changed based on the memory cell's threshold voltage state and the current write operation progress. This allows the system to use smaller step-up widths when needed to maintain data reliability while using larger step-up widths when possible to reduce write time, thus resolving the contradiction between reliability and write speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of step-up width based on the distribution width of threshold voltage. By monitoring the threshold voltage distribution and adjusting the step-up width accordingly, the system optimizes the balance between achieving narrow distribution widths (for reliability) and maintaining fast write speeds. This parameter adaptation resolves the fixed trade-off between reliability and write time.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If multi-level storage scheme is used to increase storage capacity, then storage density is improved, but adjacent-cell interference increases and data reliability deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoiddata reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by tailoring the step-up width to the specific state of each memory cell or group of cells during the write operation. Rather than using a uniform step-up width for all cells, the system adjusts the step-up width locally based on the observed threshold voltage distribution width, which varies depending on the cell's current state and its susceptibility to adjacent-cell interference. This localized adjustment maintains reliability while enabling multi-level storage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements feedback by monitoring the threshold voltage distribution width during the write operation and using this information to adjust subsequent step-up widths. The system measures the actual distribution width, compares it to target values, and modifies the step-up width in response to maintain optimal distribution narrowness. This feedback mechanism ensures data reliability in multi-level storage by continuously adapting to the actual cell states and interference conditions.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8422306B2Non-volatile semiconductor memory device
Publication Date: 2013.04.16 KIOXIA CORP
  • US8422306B2 patent drawing
  • US8422306B2 patent drawing
  • US8422306B2 patent drawing

AI summary

A control circuit applies a write pulse voltage to a selected word line to perform a write operation to 1-page memory cells along the selected word line. The circuit then performs a verify read operation to confirm whether the data write to the 1-page memory cells is completed. According to the result of the verify read operation, a step-up operation is performed out to raise the write pulse voltage by a step-up voltage. The control circuit changes the amount of the step-up voltage according to a distribution width of a first threshold voltage distribution generated in process of the write operation to the memory cells.