Flash Memory Strobe Signal Generation for Data Sampling
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Solution Overview
Problem
As clock frequencies increase, the valid data window in flash memory devices narrows and shifts due to on-chip variations such as process, voltage, and temperature fluctuations, making it challenging to synchronize read operations effectively.
Innovation Solution
A data synchronization circuit that generates a shifted strobe signal by applying coarse and fine adjustment delay values to the clock signal, systematically sequencing through combinations to align with the valid data window, using a combination of coarse and fine adjustment circuits and a control circuit to recalibrate the signal as operating conditions change.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If clock frequency is increased to improve data transfer speed, then productivity is improved, but the valid data window narrows and synchronization reliability deteriorates
Solution Approach 1:
The patent implements a dynamic valid data window determination mechanism that adjusts the strobe signal timing based on detected operating conditions (temperature, voltage, process variations). Instead of using a fixed valid data window, the system continuously monitors operating parameters and dynamically recalibrates the strobe signal delay to track the shifting valid data window, allowing high clock frequencies to be maintained while preserving synchronization reliability under varying conditions.
Solution Approach 2:
The system changes the timing parameter of the strobe signal based on detected operating conditions. By measuring actual data validity timing under different temperature, voltage, and process conditions, the system adjusts the strobe signal delay parameter to match the shifting valid data window, enabling reliable data capture at high clock frequencies despite the narrowed and shifting valid data window.
2Adaptability or versatility
If operating conditions vary (temperature, voltage, process), then adaptability is improved, but measurement precision of valid data window deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the system detects actual data validity timing under varying operating conditions and uses this information to recalibrate the strobe signal timing. The control circuit monitors operating parameters (temperature, voltage, process variations) and adjusts the strobe signal delay based on detected shifts in the valid data window, maintaining precise synchronization despite on-chip variations and environmental changes.
Solution Approach 2:
The system performs preliminary calibration by detecting the valid data window timing under current operating conditions before initiating data transfer operations. This preliminary detection and adjustment of strobe signal timing ensures that the system is properly synchronized before actual data operations begin, compensating for on-chip variations and environmental factors in advance.
3Measurement precision
If coarse and fine adjustment circuits are added to align strobe signal, then synchronization precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the timing adjustment function into two distinct parts: a coarse adjustment circuit that handles large timing offsets and a fine adjustment circuit that handles precise timing alignment. The coarse adjustment circuit provides initial strobe signal delay adjustment, while the fine adjustment circuit refines the timing alignment. This segmentation allows the system to achieve high synchronization precision without requiring a single complex adjustment mechanism, as each circuit handles a specific range of adjustments.
Data Source
AI summary
A method and circuit for generating a shifted strobe signal for sampling data read from a memory device includes generating an instantiation of a shifted strobe signal by applying both a coarse adjustment delay value and a fine adjustment delay value to a clock. Data read from a predetermined, programmed memory location or locations of the memory device is sampled using the shifted strobe signal. At least one of the applying steps is repeated and the read data is sampled again using the current instantiation of the shifted strobe signal. The process is repeated until the current instantiation of the shifted strobe signal is aligned with a valid data window of the memory device. The method can be used in both single data rate and double data rate applications.