Flash Memory Suspend Control for Low-Latency Read Access
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Solution Overview
Problem
Nonvolatile memory devices, such as flash memory, experience increased latency when a read operation is issued during a program or erase operation, as these operations take longer and can be interrupted, leading to potential data loss and reduced reliability.
Innovation Solution
A nonvolatile memory system with a normal area and a temporary area, where data is stored in a page buffer and control logic manages program loops, allowing for suspension of operations based on a suspend command and a reference value, enabling temporary data storage and resumption without data loss, thus reducing latency and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a read operation is issued during program or erase operation, then the read operation can be performed, but the latency of the read operation increases
Solution Approach 1:
The memory device divides the memory cell array into a normal area for main data storage and a temporary area for suspend/resume operations. This segmentation allows independent handling of program and read operations in different areas, enabling the read operation to proceed without waiting for the program operation to complete, thus reducing read latency while maintaining program integrity
Solution Approach 2:
The temporary area acts as an intermediary buffer between the normal program operation and read operations. When a suspend command is received, data is moved to the temporary area, allowing read operations to access this temporary data immediately without blocking the program operation in the normal area, thereby reducing read latency
2Loss of time
If program operation is suspended to perform read operation, then read latency is reduced, but data integrity may be compromised
Solution Approach 1:
Before suspending the program operation to perform a read, the system preliminarily saves the current program data to the temporary area and records the suspend state information. This preliminary action ensures that when the read operation completes, the program operation can be resumed from the exact point of suspension using the saved data and state information, maintaining data integrity while reducing read latency
Solution Approach 2:
The system implements feedback mechanisms by monitoring program operation progress and detecting suspend commands. When suspension occurs, the system uses verification operations to ensure data consistency between the normal and temporary areas, and maintains state information that feedbacks into the resume process, ensuring data integrity is preserved throughout the suspend-resume cycle
3Reliability
If program operation is completed before read operation, then data integrity is maintained, but read latency increases
Solution Approach 1:
The system dynamically adjusts the program operation execution based on incoming read requests. When a read operation is pending, the program operation is dynamically suspended and the necessary data is moved to the temporary area, allowing the read to proceed immediately. This dynamic control enables the system to balance between maintaining data integrity and minimizing read latency by adapting the program execution flow to read requirements
Data Source
AI summary
A nonvolatile memory device includes a memory cell array having a normal area and a temporary area. A page buffer stores data to be written to the normal area in a normal program operation and store a temporary data to be written to the temporary area in a temporary program operation. A control logic performs the normal program operation including a plurality of program loops. The control logic receives a suspend command before the normal program operation is completed and determines, in response to the suspend command, whether to complete the normal program operation or to suspend the normal operation and perform the temporary program operation based on a reference value representing a time for performing at least one program loop of the plurality of program loops.