Flash Memory Power Management via Switchable Circuitry
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Solution Overview
Problem
The increasing operating frequency of flash memory devices leads to higher electrical power consumption, limiting the practical capacity of memory systems and necessitating a reduction in power consumption.
Innovation Solution
A non-volatile semiconductor memory device with switchable circuitry that can controllably switch between operational states, allowing the terminal to be electrically connected or decoupled from a node in response to erase commands, thereby optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operating frequency of flash memory device is increased to achieve higher speed operation, then the operation speed is improved, but the electrical power consumption increases
Solution Approach 1:
The patent applies dynamics by making the circuit configuration changeable through switchable circuitry that can dynamically reconfigure electrical connections between nodes and terminals based on operational mode. The circuit transitions between different states (first operational state with direct connection, second operational state with modified connection) to optimize performance for different operating conditions, thereby achieving high-speed operation while managing power consumption.
Solution Approach 2:
The patent changes electrical parameters (connection state, impedance, signal path) by using switchable circuitry to alter the electrical configuration between nodes and terminals. By changing the operational state of the circuit components, the patent optimizes electrical characteristics for different operating modes, enabling speed improvement while controlling power consumption through parameter adjustment rather than fixed design.
2Use of energy by moving object
If switchable circuitry is added to enable operational state switching, then power consumption is reduced during high-speed operations, but the device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the circuit into distinct functional segments with switchable connections. The circuit is partitioned into nodes, terminals, and switchable circuitry components that can be independently controlled. This segmentation allows selective activation of circuit paths, enabling power reduction by isolating inactive segments while maintaining necessary functionality, thus managing complexity through modular organization.
Solution Approach 2:
The patent applies universality by designing switchable circuitry that serves multiple functions: it enables direct electrical connection for high-speed operation, provides modified connection for power reduction, and maintains signal integrity across different operational states. The same circuit components perform multiple roles (signal transmission, power management, state control), reducing the need for separate dedicated components and thereby managing overall device complexity.
Data Source
AI summary
A non-volatile semiconductor memory device, comprising: an interface for receiving commands issued by a controller, the commands including an erase command; a functional entity with circuit components and having a terminal; a node; switchable circuitry capable of controllably switching between a first operational state in which the terminal is electrically connected to the node and a second operational state in which the terminal is electrically decoupled from the node, the node being configured to have a signal for the functional entity communicated through it when the switchable circuitry is in the first operational state; and a command processing unit configured to recognize the commands issued by the controller and, in response to recognizing the erase command, to cause the switchable circuitry to switch from the first operational state to the second operational state.