Flash Memory Error Correction With Syndrome Re-Verification
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Solution Overview
Problem
Multi-level cell (MLC) flash memory systems face unstable data security and high error bit probabilities due to reduced noise margins, which challenges the error correction capabilities of existing codes like BCH, especially when the number of bits stored in a single cell increases, leading to errors beyond the maximum correction capability.
Innovation Solution
The proposed method involves an operation method for a flash memory system that includes obtaining first syndrome values, determining error locations, error-correcting codewords by flipping bit values, and performing subsequent syndrome operations to verify error correction, with the option to restore the codeword by re-flipping bit values when errors are detected, utilizing algorithms like Berleykamp-Massey and Chien search for efficient error location and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the number of bits stored in a single MLC increases to reduce production cost per bit, then manufacturing cost decreases, but error bit probability increases
Solution Approach 1:
The error correction process is segmented into multiple stages: first syndrome calculation, error location identification, error correction, second syndrome calculation, and conditional restoration. This segmentation allows the system to handle different error scenarios systematically, correcting correctable errors while identifying and restoring incorrectly corrected errors, thereby maintaining reliability in multi-bit MLC storage.
2Reliability
If BCH code error correction capability is increased to handle more error bits, then reliability improves, but device complexity increases
Solution Approach 1:
The system performs a first syndrome calculation before error correction to identify error locations. After correction, a second syndrome calculation is performed to verify whether the correction was successful. This preliminary and verification action prevents incorrect corrections from propagating, enabling reliable error correction without requiring overly complex decoder designs.
Solution Approach 2:
The second syndrome calculation acts as a feedback mechanism to verify the success of error correction. If the second syndrome indicates remaining errors, the system restores the original codeword, preventing incorrect data from being processed further. This feedback loop ensures reliability while maintaining manageable decoder complexity.
3Productivity
If error correction is performed by flipping bit values based on error locations, then error correction efficiency improves, but harmful factors increase when errors exceed maximum correction capability
Solution Approach 1:
The second syndrome calculation provides feedback to verify whether error correction successfully eliminated all errors. When the second syndrome indicates remaining errors, the system identifies that the error count exceeded the correction capability and restores the original codeword, preventing harmful erroneous operations from propagating.
Solution Approach 2:
The system performs preliminary verification through second syndrome calculation before accepting corrected data. This preliminary anti-action prevents incorrectly corrected data from being processed, counteracting the potential harmful effect of erroneous bit flips when errors exceed correction capability.
Data Source
AI summary
An operation method of a flash memory system includes: obtaining first syndrome values to a codeword; obtaining locations of errors and the number of the locations of errors based on the first syndrome values; error-correcting the codeword by flipping bit values of error bits of the codeword based on the locations of errors to generate an error-corrected codeword; obtaining second syndrome values to the error-corrected codeword; determining whether an error is found in the error-corrected codeword based on the second syndrome values; changing the first syndrome values when it is determined that no error is found in the error-corrected codeword; and restoring the error-corrected codeword to the codeword by re-flipping the flipped bit values when it is determined that an error is found in the error-corrected codeword.