Multi-Level Flash Memory Systematic Error Correction
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Solution Overview
Problem
High-density flash memory devices face challenges in accurately correcting systematic errors due to charge leakage and threshold drift in multi-level cells, which affect the reliability of data storage and retrieval, especially in long data streams.
Innovation Solution
A method that involves reading calibration data from multi-level flash memory, comparing it to correct calibration data to detect systematic errors, and generating feedback signals to correct for drift, using error correction control circuitry and an error processor to adjust the output signals and compensate for charge leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sense amplifiers are used to detect charge levels in MLC flash memory, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the charge level detection into multiple discrete steps using multiple sense amplifiers, each responsible for detecting specific charge level thresholds. This segmentation allows precise measurement of multi-level charge states by combining results from individual amplifier comparisons, resolving the contradiction between measurement precision and device complexity.
2Device complexity
If sequential sense amplifiers are used to reduce area, then device complexity is reduced, but measurement time increases
Solution Approach 1:
The patent implements periodic action by using control logic to sequentially activate different sense amplifiers in a systematic sequence. Each amplifier is activated at a specific time to compare charge levels against predetermined thresholds, enabling complete multi-level detection through periodic, organized operation rather than continuous or random sensing, thus reducing detection time while maintaining simplified hardware.
3Duration of action of stationary object
If charge is stored longer in flash memory cells, then data retention is improved, but charge drift increases causing systematic errors
Solution Approach 1:
The patent applies preliminary action by detecting systematic charge drift errors before they significantly degrade data accuracy. Error detection circuitry continuously monitors charge levels and identifies drift patterns early in the storage period, enabling corrective actions to be taken before the drift causes unacceptable errors, thus maintaining both long retention time and high reliability.
Solution Approach 2:
The patent implements feedback mechanisms where detected systematic errors from charge drift are fed back to the error correction circuitry. This feedback loop allows the system to dynamically adjust and correct for drift effects, compensating for the natural charge leakage that occurs during extended storage periods and maintaining data accuracy over time.
4Reliability
If error correction techniques are enhanced to correct systematic errors, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent introduces an intermediary error detection and correction layer that sits between the raw charge detection and final data output. This intermediary circuitry specifically targets systematic drift errors without requiring complete redesign of the entire memory system, providing enhanced reliability through specialized error handling while adding minimal complexity compared to comprehensive system redesign.
Data Source
Figure 1A~1B
Figure 1C
Figure 2
AI summary
In accordance with exemplary embodiments, a multi-level flash memory employs error correction of systematic errors when reading multi-level flash memory. Error correction includes i) detection of each systematic error, ii) feedback of the systematic error to circuitry within the memory, and iii) subsequent adjustment within that circuitry to cause a correction of systematic error in the output signal of the multi-level flash memory.