Flash Memory Address Table Reconstruction via Spare Area Scanning

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Solution Overview

Problem

Flash memory systems face challenges in high-speed rewriting and data management due to limitations in erasure cycles, page writing order, and difficulty in updating data without significant overhead, especially after power interruptions, which affects their usability and reliability.

Innovation Solution

A storage apparatus and method that utilize a multisession storage system with an address translation table to manage logical and physical page addresses, allowing for high-speed rewriting by invalidating original data and storing updated data in free space, while also implementing a control section to quickly reconstruct the address translation table after power interruptions by scanning spare areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the address translation table is fully reconstructed by scanning all pages after power interruption, then the table can be completely recovered, but the restart time becomes excessively long

Engineering Contradiction:
Improveaddress translation table recoveryVSAvoidrestart time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts only the essential information needed for table reconstruction from the spare areas - specifically the valid page flags and logical-to-physical address mappings - rather than scanning and processing all page data. This selective extraction dramatically reduces restart time while ensuring the address translation table can be fully recovered.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary action by maintaining valid page flags in the spare areas during normal operation, marking pages that contain valid data before power interruption occurs. This pre-prepared information allows the system to quickly identify and reconstruct only the necessary table entries after power restoration, avoiding the need to scan all pages.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If data is written to the same page multiple times, then data updating flexibility is improved, but the flash memory erasure cycle limit is exceeded more quickly

Engineering Contradiction:
Improvedata updating flexibilityVSAvoidflash memory lifespan
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the flash memory into multiple pages with individual valid flags, allowing the system to track and manage each page's state independently. This enables selective updating of only those pages that need modification while preserving others, reducing unnecessary erasure cycles and extending flash memory lifespan while maintaining data updating flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a mechanism where invalid page markers are set in spare areas when pages are updated, allowing the system to discard old data versions and recover only the necessary new data. This approach minimizes redundant erasure operations by clearly identifying which pages contain valid data that needs to be preserved.

Inventive Principle:
Principle #34Discarding and recovering

3Speed

If the spare area is used to store valid page flags and address mappings, then the reconstruction speed is improved, but the storage capacity for user data is reduced

Engineering Contradiction:
Improvereconstruction speedVSAvoiduser data storage capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent applies partial action by using only a portion of the spare area - specifically targeted bits for valid page flags and essential address mapping information - rather than utilizing the entire spare area. This selective use of spare area resources achieves fast reconstruction speed while minimizing the impact on user data storage capacity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8745310B2Storage apparatus, computer system, and method for managing storage apparatus
Publication Date: 2014.06.03 SONY GROUP CORP
  • US8745310B2 patent drawing
  • US8745310B2 patent drawing
  • US8745310B2 patent drawing

AI summary

A storage apparatus includes a flash memory, a second memory for storing an address translation table, and a control section. The flash memory is formed of multiple pages, each having a spare area, and data are stored on a page-by-page basis. The control section has the functions of: saving the table to the flash memory; when writing/updating data, storing the user data, recording, in the table, a correspondence between a logical page address and an address of a page in which the data is stored, and storing information for identifying the corresponding logical page address in the spare area of the page; when the apparatus is started, detecting pages to which data was written after the most recent saving of the table; and scanning the spare area of each page detected and reproducing a state of the table as updated after the most recent saving to reconstruct the table.