Flash Memory Threshold Optimization for Read Accuracy

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Solution Overview

Problem

Multi-level cell (MLC) NAND flash memory experiences increased bit error rates (BER) due to cell-to-cell interference and retention noise, which complicates software correction and reduces performance.

Innovation Solution

A method is introduced where a media controller iteratively measures cell voltage levels against threshold levels, employing a Markov Decision Process (MDP) to optimize threshold values until convergence, minimizing read errors and maximizing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple voltage levels per cell are employed in MLC NAND flash memory to store more bits per cell, then storage capacity increases, but cell-to-cell interference and retention noise become more severe, reducing voltage margin and increasing bit error ratio

Engineering Contradiction:
Improvestorage capacityVSAvoidbit error ratio
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing threshold optimization before the actual read operation. The media controller pre-calculates optimized threshold levels using measured cell voltage levels and convergence criteria, ensuring accurate data retrieval while minimizing bit errors. This preliminary threshold setup compensates for the reduced voltage margins caused by higher storage density.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting threshold levels based on measured cell voltage levels. Instead of using fixed thresholds, the system iteratively refines threshold values until convergence is achieved, adapting to actual cell conditions and compensating for interference and noise effects in high-density MLC configurations.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If software complexity is increased to compensate for larger bit error ratio using error correction codes, then reliability improves, but processing overhead and performance decrease

Engineering Contradiction:
Improvebit error correctionVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent reduces the need for heavy error correction by performing preliminary threshold optimization that minimizes bit errors before they occur. By establishing accurate thresholds in advance, the system prevents errors rather than correcting them, significantly reducing the burden on ECC software and improving overall processing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the challenge of reduced voltage margins and increased noise in high-density MLC into a benefit by using iterative threshold optimization. This process transforms the noisy, interference-prone environment into accurate read operations by adaptively adjusting thresholds, thereby reducing error rates without requiring complex error correction mechanisms.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Measurement precision

If the number of measurements is increased to improve read accuracy, then measurement precision improves, but the number of operations increases, reducing throughput

Engineering Contradiction:
Improveread accuracyVSAvoidread throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs a preliminary measurement of cell voltage levels to establish optimized thresholds before actual data reads. This initial measurement phase enables subsequent reads to use pre-determined accurate thresholds, achieving high read accuracy without requiring multiple measurements for each data retrieval operation, thus maintaining high throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by performing measurements selectively - only to establish initial optimized thresholds. Once thresholds are converged, subsequent reads use these pre-established values without requiring additional measurements, achieving the necessary measurement precision while minimizing the total number of operations to preserve throughput.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8848439B2Threshold optimization for flash memory
Publication Date: 2014.09.30 SEAGATE TECH LLC
  • US8848439B2 patent drawing
  • US8848439B2 patent drawing
  • US8848439B2 patent drawing

AI summary

Described embodiments provide enhanced read accuracy of a multi-level cell (MLC) flash memory. A read request for desired cells is received by a media controller of the memory. The media controller sets m thresholds to initial values, each threshold corresponding to a cell voltage level of the memory, and measures the cell voltage level of a given cell. For each of the desired cells of the memory, the media controller iteratively, until the measured cell voltage level converges on one of the thresholds, compares the measured cell voltage level to the thresholds. If the measured cell voltage level does not converge on one of the thresholds, the media controller updates the thresholds, remeasures the cell voltage level and compares the remeasured cell voltage level to the updated thresholds. Once the measured cell voltage level converges on a threshold, the media controller determines a binary level of the cell.