Flash Memory Program Verify Neighbor Cell Effect Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory with virtual ground array type memory arrays experiences a neighbor cell effect, leading to reduced reliability due to varying cell currents detected by sense amplifiers, affecting program verify processes and memory cell thresholds.
Innovation Solution
A flash memory system with a program verify function that includes a write buffer, a neighbor cell buffer, and a control circuit to execute logical operations and apply program pulses based on neighbor cell states, using different verify voltages to compensate for cell current variations and eliminate the neighbor cell effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a bit line is shared by memory cells neighboring each other (virtual ground array technology), then the degree of integration is improved, but the neighbor cell effect occurs causing reduced reliability
Solution Approach 1:
The patent segments the verification process into two distinct parts: ordinary verify process for memory cells without neighbor cell influence, and neighbor cell verify process for memory cells affected by neighbor cell effect. This segmentation allows different verification methods to be applied to different memory cells based on their specific conditions, resolving the reliability issue while maintaining high integration.
Solution Approach 2:
The patent applies different verification strategies to different memory cells based on their local conditions. Memory cells are categorized into those with neighbor cell influence and those without, and each group receives appropriate verification treatment. This local quality approach ensures that each memory cell is verified according to its specific environmental conditions, improving overall reliability in the highly integrated structure.
2Reliability
If neighbor cell effect is considered in program verify process, then reliability is improved, but device complexity increases due to additional buffers and control circuits
Solution Approach 1:
The patent introduces a neighbor cell buffer that stores verification results of neighbor cells in advance. Before performing verification on a target memory cell, the system checks the pre-stored neighbor cell results to determine whether the target cell is affected by neighbor cell effect. This preliminary action eliminates the need for complex real-time analysis during verification, reducing device complexity while maintaining improved reliability.
Solution Approach 2:
The neighbor cell buffer acts as an intermediary component that mediates between the memory array and the control circuit. It stores and provides neighbor cell verification results, enabling the control circuit to make informed decisions about verification strategies without requiring complex real-time calculations. This intermediary structure simplifies the overall system while achieving improved reliability.
3Measurement precision
If different verify voltages are applied to compensate for cell current variations, then measurement precision is improved, but use of energy increases
Solution Approach 1:
The patent applies different verify voltages only to memory cells that are determined to be affected by neighbor cell effect, rather than to all memory cells uniformly. For memory cells without neighbor cell influence, the standard verify voltage is used. This partial application of excessive verify voltage to only the necessary cells achieves measurement precision improvement while minimizing additional energy consumption.
Data Source
AI summary
In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory cell to be programmed is erroneously determined to be lower. Therefore, in a program verify process, a control circuit 3 writes a fail value to a neighbor cell buffer 5 when all neighbor cell(s) having an offset of n or less from a memory cell to be programmed are in the erased state, and when otherwise, writes a pass value to the neighbor cell buffer 5. The control circuit 3 verifies input write data and also verifies data stored in the neighbor cell buffer(s). In the latter verify process, a verify voltage higher than an ordinary one is used to compensate for the leakage of cell current.