Flash Memory Controller Adaptive Voltage Adjustment
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Solution Overview
Problem
As semiconductor storage devices are scaled down for higher integration, they face issues with data reliability due to degradation of memory cells, leading to reduced storage device lifespan and performance, particularly caused by frequent re-erasure and re-programming within critical time periods.
Innovation Solution
A method for operating flash memory storage devices that involves calculating the reuse period and number of continuous erases to determine data reliability levels, allowing for adaptive changes in operating conditions such as voltage and time during erase, program, and read operations to enhance data reliability and extend device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If storage device is scaled down for higher integration, then manufacturing cost is reduced and integration is improved, but data reliability deteriorates due to memory cell degradation
Solution Approach 1:
The patent applies dynamics by making the erase voltage adjustable rather than fixed. The control circuit dynamically changes the erase voltage based on the number of previous erase operations performed on the memory block. As the number of erases increases, the system automatically increases the erase voltage to compensate for accumulating degradation, thereby maintaining data reliability while supporting high integration scenarios.
Solution Approach 2:
The patent implements parameter changes by varying the erase voltage parameter according to the erase count. The control circuit modifies the erase voltage parameter dynamically based on the number of previous erase operations, transforming a static parameter into a dynamic one that adapts to degradation states, thus resolving the contradiction between integration and reliability.
2Productivity
If frequent re-erasure and re-programming are performed, then data updates are achieved, but memory cell degradation increases and device lifespan reduces
Solution Approach 1:
The patent applies feedback by implementing a control circuit that monitors the number of previous erase operations and uses this information to adjust the current erase voltage. This feedback mechanism ensures that as degradation accumulates from frequent updates, the system responds by increasing erase voltage to maintain effective programming, thereby extending device lifespan while preserving update capability.
Solution Approach 2:
The system makes the erase voltage dynamic rather than static, adjusting it in real-time based on the erase count. This dynamic adjustment allows the system to handle frequent updates without causing excessive degradation, as the voltage is optimized for each specific degradation state, thus extending overall device lifespan.
3Ease of operation
If standard erase voltage is used throughout, then operation simplicity is maintained, but data reliability deteriorates as memory cell degradation accumulates
Solution Approach 1:
The patent changes the erase voltage parameter from a fixed standard value to a dynamic value that varies with the number of previous erases. This parameter change allows the system to automatically adapt to degradation without requiring manual intervention, maintaining operational simplicity while significantly improving data reliability through automated voltage adjustment.
Solution Approach 2:
The control circuit performs self-service by automatically monitoring the erase count and adjusting the erase voltage without external intervention. The system serves itself by detecting degradation states and autonomously optimizing the erase voltage, thereby maintaining reliability while preserving ease of operation from the user's perspective.
Data Source
AI summary
A method for operating a storage device including a flash memory, comprising: determining a data reliability level of the flash memory; comparing the data reliability level with a threshold; and changing an operating condition of the flash memory to improve the data reliability level of the flash memory when the data reliability level of the flash memory is lower than the threshold.