Flash Memory Adaptive Read Voltage Adjustment for ECC Extension

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Solution Overview

Problem

The increasing capacity of flash memory devices requires an extension of the Error Correction Code (ECC) correction capability beyond the current limitations, which is not effectively addressed by existing technologies.

Innovation Solution

A flash memory system that includes a controller and a register to adjust read voltage and read pass voltage parameters based on the presence of specific types of errors in memory cells, allowing for adaptive correction without increasing the number of ECC bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacity of flash memory is increased, then data storage capability is improved, but the ECC correction capability becomes insufficient

Engineering Contradiction:
Improvedata storage capacityVSAvoidECC correction capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent adjusts read voltage and read pass voltage parameters dynamically based on error detection results. When errors are detected in memory cells, the system modifies voltage levels to improve sensing accuracy for subsequent read operations, enabling correction of errors that would otherwise exceed ECC capabilities.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements a feedback mechanism where read operations detect errors in memory cells, and this information is used to update read parameters for future operations. The controller monitors error patterns and adjusts voltage parameters accordingly, creating a closed-loop system that continuously improves data integrity.

Inventive Principle:
Principle #23Feedback

2Reliability

If more redundant bits are added to extend ECC correction capability, then error correction capability is improved, but die size cost increases

Engineering Contradiction:
ImproveECC correction capabilityVSAvoiddie size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of adding more redundant ECC bits, the patent changes operational parameters (voltage levels) to improve the effectiveness of existing ECC circuits. By adjusting read voltage and read pass voltage, the system enhances sensing accuracy and extends correction capability without increasing the number of stored bits.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates multiple copies of data in the form of redundant bits that are already present in the flash memory structure, but utilizes voltage adjustment to effectively generate additional correction information from existing data, rather than storing separate correction data.

Inventive Principle:
Principle #26Copying

3Measurement precision

If read voltage is increased to improve sensing accuracy, then measurement precision is improved, but memory cell errors increase due to over-stress

Engineering Contradiction:
Improvesensing accuracyVSAvoidmemory cell errors
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent dynamically adjusts voltage parameters based on detected error patterns. When errors are detected, read voltage is decreased and read pass voltage is increased, creating a balanced voltage configuration that improves sensing without causing additional cell stress or errors.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system transitions from static voltage parameters to dynamic voltage adjustment. Read parameters are modified based on real-time error detection results, allowing the system to adapt voltage levels to specific memory cell conditions and avoid uniform over-stress.

Inventive Principle:
Principle #15Dynamics

4Reliability

If read pass voltage is increased to correct coupling errors, then reliability is improved, but interference with adjacent memory cells increases

Engineering Contradiction:
Improvecoupling error correctionVSAvoidinterference with adjacent cells
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent adjusts read pass voltage specifically when coupling errors are detected in adjacent memory cells. By increasing read pass voltage selectively, the system compensates for coupling effects without continuously applying high voltage that would cause interference.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system applies preliminary voltage adjustments based on predicted coupling effects. When errors indicating coupling interference are detected, read pass voltage is increased in advance to counteract the harmful interference in subsequent operations.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS10916311B2Flash memory and operation method thereof
Publication Date: 2021.02.09 GIGADEVICE SEMICON (BEIJING) INC
  • US10916311B2 patent drawing
  • US10916311B2 patent drawing
  • US10916311B2 patent drawing

AI summary

Provided are a flash memory and an operation method thereof. The flash memory includes a memory cell array, a controller and a register. The register stores read parameters that include a read voltage value and a read pass voltage value. The controller is configured to perform the read operation on a selected page according to the read parameters to read out the raw data stored in the selected page, determine whether the raw data includes an error bit, and in response to determining that the raw data includes the error bit, update the read parameters by decreasing the read voltage value and/or increasing the read pass voltage value.