Flash Memory Programming Voltage Adjustment for TLC Error Reduction
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Solution Overview
Problem
Flash memory devices, particularly TLC flash memories, experience higher error rates for most significant bits (MSBs) during data writing, leading to significant impacts on data integrity due to the conventional programming voltage scheme, which results in lower performance and reliability.
Innovation Solution
Adjusting the programming voltage values for MSBs to increase the gaps between neighboring data patterns corresponding to MSBs, thereby reducing the error bit rate and improving data storage performance by prioritizing the most significant bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional programming voltage values are used for TLC flash memory, then data can be written to memory cells, but the error bit rate for MSBs increases significantly
Solution Approach 1:
The patent applies local quality by adjusting programming voltage values specifically for MSB operations while maintaining other voltage values for LSB and CSB. The controller identifies MSB programming operations and applies a modified voltage value (e.g., reducing by 0.2V-0.5V) only when programming MSBs, thereby locally optimizing reliability for the most error-prone bits without affecting overall system performance
Solution Approach 2:
The patent changes the programming voltage parameter specifically for MSB operations. The controller modifies the programming voltage value from the conventional value (e.g., 20V) to an adjusted value (e.g., 19.5V-19.8V) when detecting MSB programming, which reduces the error bit rate for MSBs while maintaining acceptable performance for other data bits
2Manufacturing precision
If uniform programming voltage values are applied to all data patterns, then the programming process is simple, but gaps between neighboring data patterns are insufficient leading to higher error rates
Solution Approach 1:
The patent implements preliminary action by pre-calculating and storing adjusted programming voltage values in a lookup table within the controller before actual data programming occurs. The controller pre-identifies which voltage value to use based on the data pattern type (MSB, CSB, or LSB), thereby preparing the optimal voltage in advance and avoiding complex real-time calculations during programming operations
Solution Approach 2:
The patent introduces dynamics by making the programming voltage value adaptive rather than static. The controller dynamically selects different programming voltage values based on the specific data pattern being programmed (MSB, CSB, or LSB), allowing the system to optimize voltage gaps for each bit type while maintaining operational flexibility and responsiveness
Data Source
AI summary
The invention provides a data writing method. In one embodiment, a data storage device comprises a flash memory. First, the flash memory is directed to read a plurality of programming voltage values for data programming. The programming voltage values are then adjusted to obtain a plurality of adjusted programming voltage values according to difference bits between a plurality of stored data patterns corresponding to the programming voltage values. The adjusted programming voltage values are then sent to the flash memory. The flash memory is then directed to perform data programming according to the adjusted programming voltage values, wherein the data programmed according to the adjusted programming voltage values has a lower error bit rate than that of the data programmed according to the programming voltage values.