Flash Memory Voltage Setup Concurrency
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Solution Overview
Problem
Conventional flash memory devices experience prolonged program times due to the sequential process of receiving data and setting up voltages, which lengthens the overall program operation.
Innovation Solution
Simultaneously performing data input and voltage setup operations using a flash memory device with a memory cell array, peri circuit unit, I/O controller, and controller, where the controller controls the voltage setup using address information to set row and word line voltages during the program operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage setup is performed sequentially after data input, then voltage setup can be completed accurately, but program time is lengthened
Solution Approach 1:
The controller performs voltage setup operations in advance while the data input is still in progress. Specifically, the controller sets row voltage and word line voltage during the data reception period, so that voltage setup is completed before the program operation begins. This preliminary action eliminates the sequential waiting time and allows the program operation to start immediately after data input without additional voltage setup delay.
2Productivity
If voltage setup is performed concurrently with data input, then program time is shortened, but control complexity increases
Solution Approach 1:
The controller is designed to execute voltage setup operations automatically during the data input phase. The controller receives row address information and automatically controls the voltage supply unit to set row voltage and word line voltage while data is being input through the I/O controller. This automated preliminary action reduces the need for manual sequencing and lowers control complexity despite the concurrent operations.
Data Source
AI summary
A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to program data into the memory cell array or read data stored in the memory cell array in response to a command input through a control bus. The I/O controller is configured to receive data for programming and supply the data to the peri circuit unit in response to a command provided through a data input/output (I/O) bus. The controller is configured to control the I/O controller to perform a voltage setup operation for a program while the data for program is received.