Flash Memory Wear-Leveling via Dynamic Block Selection

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Solution Overview

Problem

The scaling down of flash memory process size and advancements in multiple voltage level storage technology have led to a decrease in the theoretical erase count limit, causing blocks storing hot data to be damaged and blocks storing cold data to be poorly utilized, necessitating an optimized static wear-leveling algorithm to manage erase counts effectively.

Innovation Solution

A data retention method for flash memory arrays that selects blocks with the minimum erase count or minimum writing serial number as source blocks for data migration during wear-leveling, balancing erase counts and preventing excessive increase in erase count by moving data to appropriate blocks based on thresholds and serial numbers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional static wear-leveling algorithms are used, then data migration is performed to balance erase counts, but hot data may be moved to blocks with high erase counts causing increased wear, or cold data blocks may remain underutilized

Engineering Contradiction:
Improveflash memory lifespanVSAvoiddata migration efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by differentiating between hot data and cold data, and between hot blocks and cold blocks, applying different selection strategies for each category. Hot data is retained in hot blocks while cold data is migrated to cold blocks, optimizing wear distribution based on local data characteristics rather than uniform treatment

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamic block classification where blocks are categorized as hot or cold based on their erase count relative to the average erase count. This dynamic classification allows the wear-leveling algorithm to adapt its data migration strategy based on current block states, improving both reliability and migration efficiency

Inventive Principle:
Principle #15Dynamics

2Productivity

If blocks with minimum erase count are always selected as source blocks, then cold blocks are utilized better, but the erase count difference between blocks increases leading to faster maximum erase count growth

Engineering Contradiction:
Improveblock utilizationVSAvoiderase count balance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the selection parameter from always choosing minimum erase count blocks to choosing based on the difference between average and minimum erase counts. When this difference exceeds a threshold, minimum erase count blocks are selected; otherwise, minimum write count blocks are selected, dynamically adjusting the parameter based on wear distribution state

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If process size is scaled down and multiple voltage level storage is implemented, then storage capacity increases, but the theoretical erase count limit continuously decreases

Engineering Contradiction:
Improvestorage capacityVSAvoiderase count limit
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The patent segments the flash memory blocks into hot blocks and cold blocks based on erase count characteristics, and further segments data into hot data and cold data. This segmentation allows differential wear management strategies to be applied to different segments, extending overall memory lifespan despite reduced per-block erase limits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces cold blocks as intermediary storage for cold data, acting as a buffer that absorbs write operations and protects cold data from contributing to wear of frequently accessed blocks. This intermediary mechanism helps distribute wear more evenly across the memory system

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10509571B2Storage devices and data retention methods thereof
Publication Date: 2019.12.17 VIA TECH INC
  • US10509571B2 patent drawing
  • US10509571B2 patent drawing
  • US10509571B2 patent drawing

AI summary

A storage device includes a flash memory array and a controller. The flash memory array includes a plurality of blocks. The first block among the blocks has a minimal erase count in the blocks. When determining that a difference between an average erase count of the blocks and the minimal erase count exceeds a cold-data threshold, the controller selects the first block to be a source block. When a data migration of a data-moving process is executed, the controller moves the data of the source block to a target block.