Flash Memory Write Control for Garbage Collection Efficiency
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Solution Overview
Problem
In flash memory systems, the inefficiency of garbage collection is exacerbated by the presence of excessive and dispersedly distributed invalid data segments due to non-consecutive user data writing, which decreases the overall efficiency of data storage and retrieval processes.
Innovation Solution
A data writing method that temporarily stores system data in a temporary storage area and writes user data with consecutive logical addresses to physical programming units, ensuring that system data is written when user data is not consecutive, thereby optimizing the storage layout and improving garbage collection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If system data and user data are alternately written to flash memory following host write order, then data writing flexibility is improved, but garbage collection efficiency deteriorates due to excessive and dispersed invalid data segments
Solution Approach 1:
The patent segments the flash memory write operations into distinct types: user data writes and system data writes. By identifying and separating these different data types, the system can apply different handling strategies to each, allowing flexible write ordering while maintaining efficient garbage collection for user data through dedicated pool management.
Solution Approach 2:
The patent introduces a pool management unit as an intermediary between the host terminal and the flash memory. This intermediary component manages the mapping between logical addresses and physical programming units, enabling the system to decouple the host's write order from the physical storage layout, thereby maintaining write flexibility while optimizing garbage collection efficiency.
2Adaptability or versatility
If invalid data segments are dispersedly distributed in the same physical erasing unit, then data writing flexibility is improved, but the amount of data movement required during garbage collection increases
Solution Approach 1:
The patent segments the flash memory into different functional areas: a system data area for storing system data and a user data area for storing user data. This segmentation allows invalid system data to be isolated from user data, enabling more efficient garbage collection operations that focus only on user data without requiring extensive data movement.
Solution Approach 2:
The patent extracts system data management from the general data writing process. By separating system data writes from user data writes and managing them through different pathways (with system data going to a dedicated system data area), the system reduces the amount of invalid user data scattered throughout the memory, thereby reducing data movement requirements during garbage collection.
3Adaptability or versatility
If user data are written to physically non-consecutive locations, then data writing adaptability is improved, but garbage collection requires moving more valid data
Solution Approach 1:
The pool management unit acts as an intermediary that manages the mapping between logical addresses and physical programming units. It maintains a mapping table that tracks the physical locations of user data, enabling the system to accommodate non-consecutive physical writes while efficiently identifying and collecting only the necessary data during garbage collection operations, thereby maintaining high throughput.
Solution Approach 2:
The patent implements feedback mechanisms through the pool management unit, which continuously updates the mapping between logical and physical addresses. This feedback allows the garbage collection process to efficiently identify which physical programming units contain valid user data that needs to be preserved, reducing the amount of data movement required even when user data are written to non-consecutive locations.
Data Source
AI summary
A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.


