Flash Memory Pagelet Interleaving for Error Rate Averaging
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Solution Overview
Problem
Flash memory devices face reliability issues due to varying bit error rates across pages and devices, leading to reduced reliability and increased error probability, as conventional wear leveling techniques fail to evenly distribute program-erase cycles and error probabilities across erase blocks and devices.
Innovation Solution
The solution involves interleaving logical pages into non-overlapping pagelets, which are then distributed across multiple physical pages and devices, ensuring that each logical page experiences an average bit error rate rather than the worst-case scenario, thereby improving reliability by averaging bit error rates across multiple physical pages and devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is stored in a single physical page, then write speed is fast, but bit error rate is high and reliability is reduced
Solution Approach 1:
The patent divides logical pages into multiple non-overlapping pagelets and distributes them across multiple physical pages and devices. This segmentation allows the system to average out bit error rates across multiple storage locations, improving reliability without requiring complex real-time error correction mechanisms.
Solution Approach 2:
The patent extends the distribution dimension from within a single device to across multiple devices. By distributing pagelets across different physical devices in addition to different physical pages, the system achieves better error rate averaging and improved reliability through spatial diversity.
2Duration of action of stationary object
If wear leveling distributes program-erase cycles evenly, then device lifespan is extended, but bit error rate variation across erase blocks increases
Solution Approach 1:
The patent changes the distribution parameter from uniform wear leveling to error-rate-aware distribution. By considering the bit error rate characteristics of different physical pages and devices, the system distributes data to achieve average error rate performance while maintaining extended device lifespan through continued wear leveling.
3Reliability
If data is distributed across multiple physical pages and devices, then bit error rate is averaged and reliability improves, but system complexity increases
Solution Approach 1:
The patent segments logical pages into fixed-size non-overlapping pagelets with predetermined distribution patterns. This segmentation approach simplifies the distribution mechanism by using predefined rules rather than complex dynamic allocation algorithms, reducing system complexity while achieving error rate averaging.
4Reliability
If conventional storage methods are used, then device structure is simple, but worst-case bit error rates reduce reliability
Solution Approach 1:
The patent creates multiple copies of pagelets across different physical pages and devices according to predetermined distribution patterns. This copying approach distributes data redundancy systematically, allowing the system to tolerate worst-case bit errors in any single location while maintaining overall reliability.
Data Source
AI summary
A system for storing a plurality of logical pages in a set of at least one flash device, each flash device including a set of at least one erase block, the system comprising apparatus for distributing at least one of the plurality of logical pages over substantially all of the erase blocks in substantially all of the flash devices, thereby to define, for at least one logical page, a sequence of pagelets thereof together including all information on the logical page and each being stored within a different erase block in the set of erase blocks; and apparatus for reading each individual page from among the plurality of logical pages including apparatus for calling and ordering the sequence of pagelets from different erase blocks in the set of erase blocks.