Flash Storage Partial Page Caching for Memory Efficiency

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Solution Overview

Problem

Flash memory devices, particularly MLC NAND flash, face inefficiencies in data block programming and erase cycles, leading to increased data transfer times and performance losses due to the need for frequent allocation of new blocks for partial data, resulting in unused space and reduced reliability.

Innovation Solution

Implementing partial page caching, where a partial page block is assigned and filled with data until full, allowing contiguous data to fill a full page block, thereby reducing the need for new blocks and shortening data block program and erase cycles, using a lookup table to manage sector addresses and merge data efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If new blocks are allocated for partial data, then data can be stored, but data transfer time increases and performance decreases

Engineering Contradiction:
Improvememory usage efficiencyVSAvoiddata transfer time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent implements partial page caching that pre-allocates and fills unused space in existing flash memory blocks before allocating new blocks. This preliminary action of caching partial pages reduces the frequency of new block allocations and shortens data transfer times by preparing storage space in advance.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If new blocks are allocated frequently, then partial data can be stored, but reliability decreases due to increased wear

Engineering Contradiction:
Improvememory capacity utilizationVSAvoidflash memory reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent recovers and reuses unused space in existing flash memory blocks through partial page caching. Instead of discarding partially filled blocks and allocating new ones, the system recovers the remaining capacity by filling it with additional data, thereby reducing write amplification and extending flash memory lifespan.

Inventive Principle:
Principle #34Discarding and recovering

3Device complexity

If contiguous data is not merged, then data structure is simple, but memory usage efficiency decreases with unused space

Engineering Contradiction:
Improvedata management complexityVSAvoidmemory usage efficiency
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The patent merges contiguous data segments into full page blocks through partial page caching. When data is written, the system checks for contiguous segments and merges them to fill unused space in existing blocks, thereby improving memory usage efficiency while maintaining manageable complexity through systematic data organization.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8862860B2Flash storage partial page caching
Publication Date: 2014.10.14 MICRON TECHNOLOGY INC
  • US8862860B2 patent drawing
  • US8862860B2 patent drawing
  • US8862860B2 patent drawing

AI summary

Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by storing data bits associated with the allocation request in the at least one of the plurality of sectors, determine that the sectors are full, assigning a full page block from the plurality of blocks, and transfer the data bits associated with the allocation request from the partial page blocks to the full page block. Other apparatus, systems, and methods are disclosed.