Flash Queue Status Polling for NVSSM Throughput

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Solution Overview

Problem

In nonvolatile solid state memory (NVSSM) data storage devices, the reliance on the data storage controller to perform status polling for flash memory operations leads to resource occupation and data throughput inefficiencies, as it ties up resources and introduces operational chokepoints.

Innovation Solution

The advanced flash queue (AFQ) circuit is configured to monitor command statuses independently, allowing it to automatically initiate follow-up operations without additional input from the controller, thereby freeing the controller to perform other tasks and improving data throughput by buffering instructions in multiple command threads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the data storage controller performs status polling for flash memory operations, then command execution can be monitored and controlled, but resource occupation increases and data throughput decreases

Engineering Contradiction:
Improvecommand status monitoringVSAvoiddata throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the status polling function into two parts: the data storage controller sends commands and the flash queue circuit independently polls status responses. This segmentation allows the controller to free resources while the flash queue circuit handles status monitoring, resolving the contradiction between reliable monitoring and high throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The flash queue circuit is designed to autonomously poll flash memory status responses without requiring controller intervention. This self-service capability enables the circuit to independently monitor command execution status, eliminating the bottleneck where the controller must tie up resources for status polling.

Inventive Principle:
Principle #25Self-service

2Ease of operation

If the controller oversees command statuses, then operational control is maintained, but resource availability decreases

Engineering Contradiction:
Improveoperational controlVSAvoidresource availability
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent extracts the status polling function from the data storage controller and assigns it to the flash queue circuit. This extraction maintains operational control over flash memory commands while freeing controller resources for other tasks, resolving the contradiction between ease of operation and resource availability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If status polling is performed sequentially by the controller, then command accuracy is ensured, but processing speed decreases

Engineering Contradiction:
Improvestatus evaluation accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The flash queue circuit is pre-configured with the capability to poll status responses autonomously as commands are being executed. This preliminary preparation of the polling mechanism allows simultaneous command execution and status monitoring, ensuring accuracy while improving processing speed through parallel operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11429315B1Flash queue status polling
Publication Date: 2022.08.30 SEAGATE TECH LLC
  • US11429315B1 patent drawing
  • US11429315B1 patent drawing
  • US11429315B1 patent drawing

AI summary

Systems and methods are disclosed for command status polling at a flash queue of a non-volatile memory device. The flash queue may be configured to perform polling on the status of flash operations without direct oversight from the data storage controller or firmware. In certain embodiments, a flash queue circuit may be configured to receive, from a data storage controller of a nonvolatile solid state memory (NVSSM) data storage device, one or more commands to access a flash memory of the NVSSM data storage device, each command of the one or more commands including one or more instructions. The flash queue circuit may execute the one or more commands to access the flash memory, evaluate a status response from the flash memory at the flash queue circuit, and re-execute a sequence of instructions of the one or more commands based on the status response.