Flash Memory Rank Modulation Rewriting for Fewer Block Erasures
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memories face limitations in speed, reliability, and storage capacity due to quality degradation from block erasures, slow writing speeds, and errors caused by charge leakage and other factors, which restrict their longevity and data integrity.
Innovation Solution
A minimum push-up scheme and multi-cell storage methods are employed in flash memories, where data is stored using rank modulation coding, increasing cell levels incrementally and using multi-permutations to enhance storage capacity and reliability, and rewriting codes are developed to minimize the increase in charge levels, allowing for more rewrites before block erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conservative cell-programming process is used to avoid over-programming errors, then data reliability is improved, but writing speed becomes ten times slower than reading
Solution Approach 1:
The patent segments the programming process into multiple stages with different verification levels. Critical data undergoes rigorous multi-stage programming and verification, while less critical data uses faster single-stage programming. This segmentation allows the system to achieve overall high reliability without uniformly sacrificing writing speed across all data types.
Solution Approach 2:
The patent dynamically changes programming parameters such as voltage levels, pulse widths, and verification thresholds based on the criticality of the data being programmed. For non-critical data, higher voltage and longer pulses enable faster programming, while critical data receives more conservative parameter settings to ensure reliability.
2Reliability
If block erasure is performed to correct over-programming errors, then data reliability is restored, but the memory lifetime is reduced due to limited erasure endurance
Solution Approach 1:
The patent performs preliminary verification and correction actions during the programming process itself, detecting and correcting potential over-programming errors before they require block erasure. This preliminary action prevents the need for costly erasure operations, thereby extending memory lifetime while maintaining data reliability.
Solution Approach 2:
The patent converts the harmful effect of charge leakage and programming variability into a benefit by using these variations as additional verification states. The system deliberately programs to slightly higher thresholds and then verifies, turning potential error sources into reliability enhancement mechanisms that reduce erasure needs.
3Quantity of substance
If multi-level cells are used to increase storage capacity, then storage capacity is improved, but errors caused by charge leakage and disturbs become more common
Solution Approach 1:
The patent implements nested verification layers where multiple levels of error detection and correction codes are applied hierarchically. Inner layers handle common errors while outer layers address more complex error patterns, enabling the system to maintain high reliability in multi-level cells without sacrificing storage capacity.
Solution Approach 2:
The patent introduces intermediary reference cells and threshold cells between the actual data cells. These intermediary elements serve as mediators that absorb and indicate charge leakage and disturbance effects, allowing the system to detect and correct errors in multi-level cells while preserving their high storage capacity.
Data Source
AI summary
Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one. In yet another aspect, rank-modulation rewriting schemes which take advantage of polar codes, are provided for use with flash memory.