Flash Memory Read Command Scheduling Without DRAM Mapping Tables
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Solution Overview
Problem
Flash memory devices, particularly NAND flash, face challenges in random access due to the need to write and read data in complete pages or blocks, which increases manufacturing costs and DRAM storage requirements, necessitating methods for scheduling read commands without relying on a storage mapping table in DRAM.
Innovation Solution
A method and apparatus that utilize a processing unit to receive logical read commands, obtain physical storage locations from a high-level mapping table, and direct data retrieval through multiple access interfaces to efficiently read and clock out data from storage units, optimizing data access without the need for DRAM storage of the mapping table.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a storage mapping table is stored in DRAM to enable random access in NAND flash devices, then data access efficiency is improved, but manufacturing cost and DRAM storage requirements increase
Solution Approach 1:
The mapping table is divided into multiple mapping segments that are distributed across different storage sub-units rather than stored entirely in DRAM. Each mapping segment contains mapping information for a portion of the logical addresses, allowing the system to retrieve mapping information by accessing specific storage sub-units based on the logical address being accessed.
Solution Approach 2:
The storage sub-units themselves serve as intermediaries for storing mapping information, replacing the traditional DRAM-based mapping table storage. The processing unit coordinates access to these storage sub-units to retrieve mapping segments, using the storage medium's own structure as the intermediary mechanism.
2Ease of manufacture
If NAND flash devices use serial access instead of random access, then manufacturing cost is reduced, but data access flexibility and speed deteriorate
Solution Approach 1:
The system dynamically determines the access strategy by first retrieving mapping information to identify the physical location of desired data, then executing the appropriate read operation. This dynamic approach allows the system to optimize between serial and parallel access patterns based on the specific access requirements, maintaining cost-effectiveness while improving overall access performance.
Solution Approach 2:
The system performs preliminary retrieval of mapping information before executing the actual data read operation. By obtaining the physical storage location in advance through the mapping segment, the system can prepare the subsequent read operation more efficiently, reducing the overall access time despite the serial nature of NAND flash.
3Reliability
If complete pages or blocks are read from NAND flash, then data integrity is maintained, but data access precision and efficiency worsen
Solution Approach 1:
The system extracts only the specific mapping segment information needed from the storage sub-units rather than retrieving entire pages or blocks. By using the mapping segment to identify the exact physical location, the system can then perform targeted reads of only the required data portions, maintaining data integrity while improving access efficiency.
Data Source
AI summary
A method for scheduling read commands, performed by a processing unit, includes at least the following steps: receiving a logical read command and a logical address; obtaining a high-level mapping table; obtaining a mapping table block according to the logical address and the high-level mapping table; obtaining a first physical address according to the logical address and the mapping table block; outputting an actual read command and the first physical address to a storage unit to obtain a data; and outputting the data which is responsive to the logical read command. The high-level mapping table includes a plurality of records, and one of the records is utilized to illustrate a second physical address of the mapping table block.