Flash Memory Read Voltage Adjustment Using Bit Distribution Feedback
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory systems face challenges in accurately reading data due to changes in threshold voltage distribution caused by factors like program/erase cycles and retention time, leading to incorrect data retrieval and uncorrectable errors.
Innovation Solution
A method and memory controller that utilize binary digit distribution characteristics of bit sequences to adaptively adjust control gate voltages for reading data from flash memory cells, performing multiple read operations with different voltage settings to determine accurate readout information and reduce errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If original control gate voltage settings are used to read data from flash memory cells, then the reading process is simple and fast, but the data accuracy deteriorates due to threshold voltage distribution changes from program/erase cycles and retention time
Solution Approach 1:
The patent applies preliminary action by performing a read disturbance compensation operation before the actual data read operation. The method first reads data using initial control gate voltages, then uses error correction codes to identify and correct threshold voltage distribution shifts, and finally performs a second read with adjusted control gate voltages to retrieve accurate data without being affected by the threshold voltage changes caused by program/erase cycles and retention time.
Solution Approach 2:
The patent implements feedback by using the results of the first read operation and error correction to adjust the control gate voltage settings for the second read operation. The error correction code analysis provides feedback information about threshold voltage distribution changes, which is then used to modify the control gate voltages to compensate for these changes and improve data reading accuracy.
2Measurement precision
If multiple read operations with different control gate voltage settings are performed, then data reading accuracy is improved, but the reading time increases
Solution Approach 1:
The patent performs a preliminary read operation with initial control gate voltages to establish a baseline reading. This first read, combined with error correction code analysis, provides information about threshold voltage distribution changes, allowing the system to quickly adjust voltages for a second, more accurate read operation, rather than performing multiple exhaustive reads from scratch.
Solution Approach 2:
The patent discards the potentially inaccurate data from the first read operation (which may be affected by threshold voltage shifts) and recovers the correct data through a second read operation with adjusted control gate voltages. The error correction codes serve to identify which data needs to be discarded and recovered, optimizing the trade-off between reading time and accuracy.
3Reliability
If error correction codes are used to detect and correct errors, then data reliability is improved, but the processing complexity and time increase
Solution Approach 1:
The patent uses error correction codes to provide feedback information about data integrity and threshold voltage distribution changes. The error correction process analyzes the first read results and generates control signals that adjust the control gate voltages for the second read, creating a feedback loop that improves data reliability while managing processing complexity through automated voltage adjustment.
Solution Approach 2:
The patent changes the control gate voltage parameters based on error correction code analysis. When errors are detected in the first read operation, the system modifies the control gate voltage settings for the second read operation to compensate for threshold voltage distribution shifts, thereby improving data reliability through parameter adjustment rather than requiring completely redundant read operations.
Data Source
AI summary
A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.