Flash Memory Readout Using Bit Distribution and Gate Voltage Adjustment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory cells experience disturbances in threshold voltage distribution due to factors like increased program/erase cycles and retention time, leading to incorrect data retrieval when using original control gate voltage settings.
Innovation Solution
A method and memory controller that perform multiple read operations on flash memory cells using different control gate voltage settings to determine binary digit distribution characteristics, allowing for accurate data retrieval by adapting to changes in threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If original control gate voltage settings are used for reading data from flash memory cells, then the reading operation is simple and fast, but uncorrectable errors increase due to threshold voltage distribution changes from program/erase cycles and retention time
Solution Approach 1:
The patent applies preliminary action by performing a test read operation before the actual data read to detect threshold voltage distribution changes. The controller reads test data using original control gate voltages, determines if errors occurred, and adjusts control gate voltages in advance before reading actual data, thereby preventing uncorrectable errors without complicating the main read operation
Solution Approach 2:
The patent implements feedback by using the results of test read operations to adjust control gate voltage settings. The controller monitors whether test data contains uncorrectable errors and feeds this information back to modify the control gate voltages for subsequent data reads, creating a closed-loop system that adapts to threshold voltage distribution changes
2Measurement precision
If multiple read operations with different control gate voltage settings are performed to detect binary digit distribution characteristics, then data read accuracy improves, but read time increases
Solution Approach 1:
The patent applies partial action by performing only one test read operation with adjusted control gate voltages instead of multiple sequential reads. The controller determines binary digit distribution characteristics from a single test read and uses these characteristics to correct actual data reads, reducing the time penalty while maintaining detection accuracy
Solution Approach 2:
The test read operation is performed as a preliminary action before actual data reads. By detecting threshold voltage distribution changes in advance through this single test operation, the system prepares corrected control gate voltage settings that will be used for subsequent data reads, thereby minimizing the time impact on actual data access
Data Source
AI summary
A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.