Flash Memory Readout Using Bit Distribution and Voltage Shifts

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Solution Overview

Problem

Flash memory cells experience disturbances in electrical charge due to factors like write, read, and retention, leading to changes in threshold voltage distribution, making it difficult to accurately read stored data using original control gate voltage settings.

Innovation Solution

A method and memory controller that perform multiple read operations on flash memory cells using different control gate voltage settings to determine binary digit distribution characteristics, allowing for accurate data retrieval by adapting to changes in threshold voltage distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If original control gate voltage settings are used to read data from flash memory cells, then the read operation is simple and fast, but the accuracy of data retrieval deteriorates due to threshold voltage distribution changes caused by write, read, and retention disturbances

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidread operation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing multiple read operations with different control gate voltage settings before final data retrieval. The system pre-acquires bit sequences at various voltage levels (e.g., Vread1, Vread2, Vread3) to establish binary digit distribution characteristics in advance, allowing accurate determination of stored data even when threshold voltage distribution has changed due to disturbances

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements parameter changes by varying control gate voltage settings across multiple read operations. Instead of using a single fixed voltage, the system reads bit sequences at different voltage levels (changing the electrical parameter) to capture the distribution characteristics of binary digits, thereby adapting to threshold voltage shifts and improving data retrieval accuracy

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple read operations with different control gate voltage settings are performed, then data retrieval accuracy improves, but the time required for read operations increases

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidread operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by performing a limited number of read operations (e.g., 3 operations at different voltage levels) rather than exhaustive measurements. This partial sampling is sufficient to determine binary digit distribution characteristics and achieve accurate data retrieval, avoiding unnecessary time consumption from excessive read operations

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent uses copying by acquiring multiple bit sequences (copies of the same data at different voltage levels) and using these copies to determine the underlying binary digit distribution. Instead of performing complex measurements, the system creates voltage-dependent copies of the data and analyzes their statistical characteristics to retrieve the original information accurately

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11139032B2Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory
Publication Date: 2021.10.05 SILICON MOTION INC
  • US11139032B2 patent drawing
  • US11139032B2 patent drawing
  • US11139032B2 patent drawing

AI summary

A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.