Flash Physical-Resource Set Management via Address Conversion

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Solution Overview

Problem

Current flash memory systems face performance degradation due to shared physical resources among applications, leading to potential conflicts and errors, especially with the introduction of new flash standards like NVMe that separate physical resources into sets, requiring improved firmware design for efficient management.

Innovation Solution

An apparatus and method utilizing a processing unit, random access memory (RAM), and an address conversion circuit to manage flash physical-resource sets by allocating temporary space for variables and converting memory addresses to relative addresses for specific sets, enabling efficient access and operation within designated resource sets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If flash physical resources are shared by all applications, then resource utilization is improved, but system performance degrades due to conflicts and errors

Engineering Contradiction:
Improveresource utilizationVSAvoidsystem performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments flash physical resources into multiple independent sets, where each set can be independently allocated to different applications. This segmentation prevents conflicts between applications by ensuring that each application operates on dedicated physical resources, thereby maintaining high resource utilization while eliminating performance degradation caused by shared resource conflicts.

Inventive Principle:
Principle #1Segmentation

2Productivity

If flash physical resources are separated into multiple sets, then system performance is improved by reducing conflicts, but firmware complexity increases

Engineering Contradiction:
Improvesystem performanceVSAvoidfirmware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs a unified firmware architecture that can universally manage multiple flash physical-resource sets through a single set of control logic and data structures. The firmware uses a set identifier to selectively access appropriate memory segments and configuration data, allowing one firmware instance to handle multiple resource sets without requiring separate firmware for each set, thereby maintaining simplicity while supporting performance improvements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If firmware is re-designed to support multiple flash physical-resource sets, then resource management is improved, but maintenance difficulty increases

Engineering Contradiction:
Improveresource managementVSAvoidmaintenance difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of repair

Solution Approach 1:

The patent organizes firmware data structures and memory segments with distinct local qualities for each flash physical-resource set, where each set has its dedicated configuration area and variable storage. This modular organization with clear boundaries and set-specific identifiers makes it easier to locate, debug, and maintain specific resource set configurations without affecting other sets, thereby improving maintainability while enabling sophisticated resource management.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11675698B2Apparatus and method and computer program product for handling flash physical-resource sets
Publication Date: 2023.06.13 SILICON MOTION INC
  • US11675698B2 patent drawing
  • US11675698B2 patent drawing
  • US11675698B2 patent drawing

AI summary

The invention introduces an apparatus for handling flash physical-resource sets, at least including a random access memory (RAM), a processing unit and an address conversion circuit. The RAM includes multiple segments of temporary space and each segment thereof stores variables associated with a specific flash physical-resource set. The processing unit accesses user data of a flash physical-resource set when executing program code of a Flash Translation Layer (FTL). The address conversion circuit receives a memory address issued from the FTL, converts the memory address into a relative address of one segment of temporary space associated with the flash physical-resource set and outputs the relative address to the RAM for accessing a variable of the associated segment of temporary space.