3D Flash Memory Seal Ring Layout for Tile Isolation Leakage
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Solution Overview
Problem
Current 3D memory devices face challenges in isolating the stack structure of adjacent tile regions, leading to leakage paths between the substrate and the grounded conductive layer, which affects memory cell operation and off current (Ioff) performance.
Innovation Solution
A seal ring is formed in the periphery of the tile region during the manufacturing process, extending through the composite stack structure to isolate the stacked structure of two adjacent tile regions, reducing leakage paths and enhancing off current (Ioff) performance without increasing process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If no seal ring is formed in the periphery of the tile region, then the manufacturing process is simpler, but leakage paths exist between the substrate and the grounded conductive layer, reducing off current (Ioff) performance
Solution Approach 1:
The seal ring structure is merged with the existing composite stack structure by forming it within the same alternating insulating and intermediate layers. This integration allows the seal ring to be created using the same manufacturing processes as the memory stack, avoiding additional process steps while providing effective isolation to improve off current performance
Solution Approach 2:
The seal ring acts as an intermediary structure that provides electrical isolation between adjacent tile regions. By forming the seal ring within the composite stack structure using the same alternating layers, it mediates the isolation function without requiring separate processing, thus improving reliability without increasing device complexity
2Reliability
If a seal ring is formed in the periphery of the tile region, then leakage paths are reduced and off current (Ioff) performance is improved, but the device structure becomes more complex
Solution Approach 1:
The seal ring is merged with the composite stack structure, sharing the same alternating insulating and intermediate layers. This merging eliminates the need for separate structural elements, providing effective isolation between tile regions while maintaining structural simplicity and avoiding increased device complexity
Solution Approach 2:
The composite stack structure serves multiple functions: it forms the memory stack for data storage and simultaneously provides the seal ring structure for isolation when formed in the peripheral region. This multi-functionality allows the same structure to provide both memory functionality and isolation, improving reliability without adding structural complexity
Data Source
AI summary
A memory device may be applicated in a 3D AND flash memory device. The memory device includes a dielectric substrate, a plurality of memory cells, a slit structure, and a middle section of a seal ring. The gate composite stack structure disposed on the dielectric substrate in a first region and a second region of the dielectric substrate. The plurality of memory cells disposed in the composite stack structure. The slit structure extends through the composite stack structure in first region. The composite stack structure is divided into a plurality of blocks. The middle section of a seal ring extends through the composite stack structure in the second region. The middle section of the seal ring includes a body part extending through the composite stack structure in the second region and a liner layer located between the body part and the composite stack structure.