Flash Memory Sense Amplifier Power Reduction
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Solution Overview
Problem
Existing sense amplifiers in flash memory systems consume significant power due to constant current draw and require large die area, with noise sensitivity in the CASREF signal and high standby current consumption.
Innovation Solution
The proposed sense amplifier incorporates variable capacitors in both the reference and read circuits, allowing for reduced power consumption by sharing charge during the pre-charge process and utilizing a race condition to determine data values, with optional trimming of voltage and capacitance for improved efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If constant current is drawn by memory cell and associated circuitry, then reliable data reading is achieved, but power consumption increases significantly
Solution Approach 1:
The patent implements periodic action by controlling current flow through the memory cell only during the brief read operation window, rather than maintaining constant current. The read circuit is activated temporarily to perform the comparison operation, then deactivated, thereby achieving reliable data reading while minimizing overall power consumption during standby and non-read periods.
Solution Approach 2:
The patent changes the current parameter dynamically - using higher current during the active read operation to ensure reliable detection, and reducing or eliminating current during standby periods. This parameter modulation allows the system to maintain reading reliability when needed while reducing power consumption during non-operational states.
2Reliability
If reference memory cell is provided in separate read bank, then accurate reference comparison is achieved, but die area increases and additional Y-decoding power is consumed
Solution Approach 1:
The patent merges the reference memory cell with the selected memory cell within the same read bank, eliminating the need for a separate reference bank. This consolidation reduces die area and removes the requirement for additional Y-decoding circuitry, while the reference cell still provides accurate comparison functionality through shared bit line architecture.
Solution Approach 2:
The reference memory cell serves multiple functions: it provides reference current for comparison operations and shares the same bit line infrastructure as selected cells. This multi-functionality allows a single cell to fulfill both reference and data storage roles, reducing overall die area while maintaining comparison accuracy.
3Ease of operation
If CASREF signal is used for sense amplifier control, then sense amplifier operation is enabled, but noise sensitivity increases and standby current consumption rises
Solution Approach 1:
The patent creates a local copy of the reference current functionality within each sense amplifier unit, eliminating the need for a shared CASREF signal that propagates noise. Each sense amplifier generates its own reference current locally, which copies the essential reference function without the noise and standby current penalties of a shared signal distribution network.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces power consumption during the pre-charge process for both reference and selected bit lines, enhancing the overall efficiency of the sense amplifier while maintaining accurate data determination.
Implementation Method 1
the capacitors can include a first capacitor coupled to the first bit line and a second capacitor coupled to the second bit line
Data Source
Figure 1
Figure 2
Figure 3A~3B
AI summary
An improved low-power sense amplifier for use in a flash memory system is disclosed. The reference bit line and selected bit line are pre-charged during a limited period and with limited power consumed. The pre-charge circuit can be trimmed during a configuration process to further optimize power consumption during the pre-charge operation.