Flash Memory Sensing Circuit With Bit-Line Clamping at Low Voltage
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Solution Overview
Problem
Conventional flash memory devices face challenges in operating efficiently at low power supply voltages, leading to increased bit line voltage swing, decreased reading speed, and increased stress on memory cells.
Innovation Solution
A sensing circuit comprising a first load element, inverting circuits, and a sense amplifier that clamps the voltage of bit lines in both the main and reference cell arrays, reducing voltage swing and allowing for quick data sensing at low power supply voltages, utilizing PMOS or NMOS transistors and current mirrors to maintain reading speed and reduce memory cell stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the power supply voltage is decreased to reduce power consumption, then power consumption is reduced, but bit line voltage swing increases causing reading speed to decrease and memory cell stress to increase
Solution Approach 1:
A sense amplifier is introduced as an intermediary component between the bit lines and the readout circuitry. The sense amplifier actively amplifies the small voltage differences on the bit lines, enabling reliable data sensing even when the voltage swing is reduced due to low power supply voltage operation
Solution Approach 2:
The invention changes the operating parameters of the sensing circuit by using a sense amplifier with specific gain characteristics and bandwidth optimized for low voltage operation. This allows the circuit to maintain adequate signal-to-noise ratio and reading speed even at reduced power supply voltages
2Use of energy by moving object
If the power supply voltage is decreased to reduce power consumption, then power consumption is reduced, but bit line voltage swing increases causing stress on memory cells to increase
Solution Approach 1:
The sense amplifier acts as a buffer and signal conditioner between the memory cell and the external circuitry, isolating the memory cell from the effects of large voltage swings while still enabling reliable data retrieval through active amplification of the differential signal
3Device complexity
If conventional sensing circuits are used at low power supply voltage, then device complexity is maintained, but reading speed decreases due to increased bit line voltage swing
Solution Approach 1:
The sense amplifier is designed to automatically activate during the read operation and self-adjust its amplification based on the differential input signal from the bit lines, eliminating the need for additional control circuitry or complex timing mechanisms while maintaining high reading speed
Data Source
AI summary
A sensing circuit that operates even at a low power supply voltage and reduces stress on a memory cell in a flash memory device without lowering a reading speed at the low power supply voltage is provided. The sensing circuit includes a first load element, a first inverting circuit, a second load element, a second inverting circuit, and a sense amplifier. The first load element includes an end connected with a bit line of a main cell array within the flash memory device. The first inverting circuit includes an input terminal connected with the bit line of the main cell array and an output terminal connected with another end of the first load element. The second load element includes an end connected with a bit line of a reference cell array within the flash memory device. The second inverting circuit includes an input terminal connected with the bit line of the reference cell array and an output terminal connected with another end of the second load element. The sense amplifier compares a voltage of the bit line of the main cell array with a voltage of the bit line of the reference cell array and generates an output signal according to a result of the comparison.