Flash Memory Source Line Opening Without a Second Etch Mask
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Solution Overview
Problem
The formation of high resistance connections between contact vias and source lines in flash memory devices due to photoresist scum, leading to device failure and shifts in operating parameters, is a challenge in bulk manufacturing.
Innovation Solution
An enhanced etch method is introduced that omits the second mask, allowing the second etch to be performed with the first mask in place, thereby thinning the source dielectric layer and extending the opening through it to expose the source line, reducing the risk of photoresist scum and using one less photomask, which is costly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a second mask is used to open the source line, then the contact vias can be formed with proper alignment, but photoresist scum accumulates on the source line causing high resistance connections
Solution Approach 1:
The patent removes the second mask from the manufacturing process entirely. Instead of applying a second photomask to define the source line opening, the method uses the first mask (which defines the contact via openings) to perform both the contact via etch and the source line etch in sequence, eliminating the source of photoresist scum accumulation while maintaining proper alignment through the single mask's pattern design
Solution Approach 2:
The patent combines the contact via opening and source line opening operations into a single etch process using one mask. The first mask simultaneously defines both the contact via openings and the source line opening region, merging two separate photolithography steps into one, thereby eliminating the second photoresist application and reducing scum formation
2Manufacturing precision
If multiple photomasks are used in the etch process, then precise patterning is achieved, but manufacturing cost increases
Solution Approach 1:
The patent merges the functionality of two separate photomasks into a single mask design. The first mask is engineered to define both the contact via openings and the source line opening region, consolidating two photolithography steps into one, thereby reducing mask fabrication costs, alignment costs, and process complexity while maintaining the required patterning precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the likelihood of high resistance connections, enhances the process window for forming silicide layers and contact vias, and lowers manufacturing costs by minimizing photomask usage and scum-related issues, thereby improving yield and maintaining operating parameters within specifications.
Implementation Method 1
performing a second etch into the source dielectric layer through the first opening, and with the first mask in place, to thin the source dielectric layer at the first opening
Data Source
AI summary
Various embodiments of the present disclosure are directed towards a method for opening a source line in a memory device. An erase gate line (EGL) and the source line are formed elongated in parallel. The source line underlies the EGL and is separated from the EGL by a dielectric layer. A first etch is performed to form a first opening through the EGL and stops on the dielectric layer. A second etch is performed to thin the dielectric layer at the first opening, wherein the first and second etches are performed with a common mask in place. A silicide process is performed to form a silicide layer on the source line at the first opening, wherein the silicide process comprises a third etch with a second mask in place and extends the first opening through the dielectric layer. A via is formed extending through the EGL to the silicide layer.