Flash Storage Address Translation and Controller Architecture

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Solution Overview

Problem

Traditional storage systems face inefficiencies in data management and storage operations, particularly in handling flash storage systems where direct-mapped flash storage systems lack address translation by storage controllers, leading to redundant write operations and reduced reliability.

Innovation Solution

Implementing a storage system where the operating system initiates and controls processes across flash drives without address translation by storage controllers, utilizing non-volatile random access memory (NVRAM) for quick data buffering and erasure coding for redundancy, and employing a dual storage array controller setup for failover and data distribution across multiple storage nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If address translation by storage controllers is implemented in flash storage systems, then data management flexibility is improved, but write operation redundancy increases and reliability decreases

Engineering Contradiction:
Improvedata management flexibilityVSAvoidwrite operation reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent extracts the address translation function from the storage controller and implements it directly in the flash storage device. This removes the redundant translation layer in the controller, eliminating unnecessary write operations and improving reliability while maintaining data management flexibility through the device's internal address mapping capabilities

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If dual storage array controller setup is implemented, then failover capability and data availability are improved, but system complexity increases

Engineering Contradiction:
Improvefailover capabilityVSAvoidcontroller configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple controllers into a unified architecture where flash storage devices can operate independently with integrated address translation. This consolidation maintains failover capability through redundant device paths while reducing overall system complexity by eliminating the need for complex dual-controller coordination and address management

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If erasure coding is implemented for redundancy, then data integrity is improved, but storage operation complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidstorage operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements erasure coding functionality directly within the flash storage device, enabling it to perform self-service error correction and data reconstruction. This internal implementation maintains data integrity through erasure coding while reducing operational complexity by eliminating the need for external controller management of coding operations

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20220391124A1Software Lifecycle Management For A Storage System
Publication Date: 2022.12.08 PURE STORAGE INC
  • US20220391124A1 patent drawing
  • US20220391124A1 patent drawing
  • US20220391124A1 patent drawing

AI summary

Software lifecycle management for a storage system, including: generating, based on user input, a user-defined software lifecycle management policy for software on one or more storage systems; identifying, in dependence upon on a software configuration of the one or more storage systems, one or more candidate updates for the software; and generating, in dependence upon the user-defined software lifecycle management policy, lifecycle management data that identifies one or more conforming updates from among the one or more candidate updates.