Flash Storage Controller Partial Link Table Segmentation

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Solution Overview

Problem

Conventional flash storage devices face inefficiencies in managing link tables due to increased workload when data access frequency is high, leading to potential delays in data access processes between hosts and flash storage devices.

Innovation Solution

Divide logical addresses into logical address ranges, create partial link tables for each range, store these in flash memory, combine them to form a link table, and use this table to convert logical addresses to physical addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single link table is used to store mapping relationships for all physical addresses, then the controller can perform address conversion, but the memory requirement and controller workload increase significantly when data capacity is greater

Engineering Contradiction:
Improvedata capacityVSAvoidmemory requirement for link table
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent divides the single link table into multiple partial link tables, each storing mapping relationships for specific physical address ranges. This segmentation reduces the memory footprint of each individual table while maintaining the ability to map all logical addresses to physical addresses through the combined partial tables.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the link table is stored in flash memory and loaded to controller memory, then address conversion can be performed, but the controller workload increases when host accesses data at high frequency

Engineering Contradiction:
Improvedata access efficiencyVSAvoidcontroller workload
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

By segmenting the link table into partial tables stored in flash memory, the controller only needs to load and manage smaller portions of the mapping data rather than the entire link table, reducing the controller's processing burden during high-frequency data access operations.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the link table records mapping relationships for all physical addresses, then complete address conversion is achieved, but the data access process may be delayed when data capacity is greater

Engineering Contradiction:
Improveaddress conversion completenessVSAvoiddata access time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the comprehensive link table into multiple smaller partial link tables that can be more efficiently managed and accessed. This segmentation maintains complete address conversion capability while reducing the time required to process and update mapping relationships during data access operations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8549212B2Flash storage device and operation method thereof
Publication Date: 2013.10.01 SILICON MOTION INC
  • US8549212B2 patent drawing
  • US8549212B2 patent drawing
  • US8549212B2 patent drawing

AI summary

The invention provides a flash storage device. In one embodiment, the flash storage device comprises a flash memory and a controller. The flash memory comprises a plurality of blocks, wherein each of the plurality of blocks comprises a plurality of pages for storing data, and each of the plurality of pages has a physical address. The controller divides a plurality of logical addresses into a plurality of logical address ranges, records a plurality of partial link tables respectively storing a mapping relationship between logical addresses of a corresponding logical address range and corresponding physical addresses, stores the partial link tables in the flash memory, combines the partial link tables to obtain a link table, and converts logical addresses sent by a host to physical addresses according to the link table.