Flash Memory Superblocks with Segmented Erasure for Peak Power Control
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Solution Overview
Problem
The peak power required for erasing a superblock in flash memory devices increases when memory blocks are simultaneously accessed, leading to inefficient power consumption and performance inconsistencies.
Innovation Solution
A data storage device that groups memory blocks into erasing units, determining a uniform erase interval and minimizing the number of blocks erased simultaneously, ensuring consistent performance by managing memory blocks as superblocks and controlling erase operations based on write operation modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory blocks are combined into superblocks to improve access speed, then access speed is improved, but peak power consumption during erase operation increases
Solution Approach 1:
The patent divides the superblock into multiple erasing units, each containing a subset of memory blocks. Instead of erasing the entire superblock simultaneously, the controller sequentially erases each erasing unit with uniform erase intervals. This segmentation reduces the peak power consumption during erase operations while maintaining the performance benefits of superblock access speed improvements.
2Productivity
If multiple memory blocks are erased simultaneously to improve productivity, then erase speed is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic erase operations where multiple erasing units are erased sequentially with uniform erase intervals. This periodic action allows the system to maintain high productivity by erasing multiple blocks while distributing the power consumption over time, preventing peak power spikes that would occur with simultaneous erase operations.
Data Source
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AI summary
The present disclosure provides a data storage device and method of operating the same. The data storage device may include a storage medium including a plurality of memory blocks; and a storage controller configured to combine memory blocks that are simultaneously accessed among the plurality of memory blocks to manage the combined memory blocks as a superblock. The storage controller erases a preliminary superblock for a subsequent write operation during a write time corresponding to a write operation mode of a selected superblock performing a write operation. The storage controller classifies memory blocks of the preliminary superblock into a plurality of erasing units each including a set number of the memory blocks, the plurality of erasing units being sequentially erased with a uniform erase interval between erase operations of the plurality of erasing units.