Flash Translation Layer Logical-to-Physical Table Update Optimization

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Solution Overview

Problem

Current storage devices experience bottlenecks in write speed due to processing limitations at the flash translation layer during sequential data writes, leading to inefficiencies in data transfer and potential bottlenecks in storage operations.

Innovation Solution

The method involves predetermining open contiguous blocks on the storage device for sequential data and populating a logical-to-physical address translation table with fixed granularity entries, allowing for optimized data routing and reduced processing overhead during write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the flash translation layer updates the address translation table during data transfer, then data can be routed to correct physical addresses, but write speed is reduced due to processing overhead

Engineering Contradiction:
Improvedata routing accuracyVSAvoidwrite speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The flash translation layer predetermines open contiguous blocks and pre-populates the address translation table with logical-to-physical mappings before data transfer begins. This preliminary action eliminates the need for table updates during data transfer, allowing data to be written at high speed without processing overhead while maintaining correct routing through the pre-established mappings.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the flash translation layer processes data sequentially, then data can be written to memory device, but processing time increases creating a bottleneck

Engineering Contradiction:
Improvedata transfer throughputVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The flash translation layer performs all necessary address translation and block determination actions before data transfer starts. By pre-determining the destination blocks and populating the translation table in advance, the system eliminates processing time during the actual data transfer window, thereby maximizing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The host interface module continuously transfers data to the memory device without interruption once the address translation table is pre-populated. The flash translation layer remains in a ready state with pre-established mappings, allowing data to flow continuously without processing delays, maintaining uninterrupted useful action throughout the transfer.

Inventive Principle:
Principle #20Continuity of useful action

3Ease of manufacture

If the host interface module performs stream classification and chunking, then data can be organized for optimal storage, but processing complexity increases

Engineering Contradiction:
Improvedata organization efficiencyVSAvoidprocessing complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The host interface module performs stream classification and chunking operations before data reaches the flash translation layer. By completing this data organization work in advance, the flash translation layer receives pre-sorted and pre-chunked data, simplifying its task to merely routing and storing without adding its own processing complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240370368A1Method for optimizing logical-to-physical table updates for fixed granularity logical-to-physical tables
Publication Date: 2024.11.07 SANDISK TECHNOLOGIES LLC
  • US20240370368A1 patent drawing
  • US20240370368A1 patent drawing
  • US20240370368A1 patent drawing

AI summary

Performance on a storage device may be improved when executing a write command with sequential host data. The storage device optimizes logical-to-physical table updates for fixed granularity logical-to-physical tables that are populated when writing the sequential host data. A host interface module on the storage device may receive, from a host, a command to store the host data on a memory device and classify the host data as sequential host data or random host data. A flash translation layer on the storage device predetermines open contiguous blocks on the memory device where the sequential host data is to be written and provides a beginning address of the open contiguous blocks to the host interface module. The host interface module populates an address translation table with logical-to-physical mappings starting at the beginning address with an appropriate offset. Each entry in the address translation table corresponds to a fixed granularity.