Flash Memory Trip Voltage Regulation for Low-Voltage Sensing

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Solution Overview

Problem

Flash memory devices face challenges in maintaining data reliability and sensing margin with low operating voltages, particularly in low-power environments, due to variations in trip voltage.

Innovation Solution

The flash memory device employs a sampling switch circuit and a voltage regulator to adjust the trip voltage using a pull-down NMOS transistor, reducing variation and improving sensing margin by pre-charging a sensing node and defining trip voltage based on data stored in selected memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If low operating voltage is used to reduce power consumption, then power consumption is reduced, but sensing margin and data reliability deteriorate due to trip voltage variations

Engineering Contradiction:
Improvepower consumptionVSAvoidsensing margin
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent changes the voltage parameter by introducing a voltage regulator that dynamically adjusts the source voltage level. The regulator modifies the voltage supplied to the pull-down NMOS transistor, thereby controlling the trip voltage level to maintain adequate sensing margin even when operating at low supply voltages for reduced power consumption

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The voltage regulator acts as an intermediary component between the power supply and the sensing circuit. It mediates the voltage level to ensure that the trip voltage remains within an acceptable range, preventing direct exposure of the sensing circuit to excessive voltage variations that would compromise reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If low operating voltage is used to reduce power consumption, then power consumption is reduced, but trip voltage variation range increases

Engineering Contradiction:
Improvepower consumptionVSAvoidtrip voltage variation range
Core Design Contradiction:
Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The voltage regulator dynamically adjusts the source voltage parameter to compensate for variations. By changing the voltage level in response to detected variations, the system maintains a stable trip voltage characteristic even when operating at low power conditions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The sensing circuit provides feedback information about the actual trip voltage or sensing conditions to the voltage regulator. The regulator uses this feedback to adjust the source voltage, creating a closed-loop control system that stabilizes the trip voltage against variations caused by low operating voltages

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12512166B2Flash memory for adjusting trip voltage using voltage regulator and sampling switch circuit and sensing method thereof
Publication Date: 2025.12.30 SAMSUNG ELECTRONICS CO LTD
  • US12512166B2 patent drawing
  • US12512166B2 patent drawing
  • US12512166B2 patent drawing

AI summary

A flash memory device including a cell string including memory cells, a page buffer connected to the cell string and a bit line and configured to sense data stored in a selected memory cell by pre-charging a sensing node connected to the bit line, the page buffer including a latch including a latch node and an inverted latch node, a sampling switch circuit configured to perform a trip voltage sampling operation by electrically connecting the latch node and the sensing node according to a sampling control signal, and a pull-down NMOS transistor configured to define a trip voltage provided to the latch node based on a sensing result of the data stored in the selected memory cell, and a voltage regulator configured to adjust the trip voltage by providing a source voltage to the pull-down NMOS transistor of the page buffer, may be provided.