Flash Memory Wear Leveling Using Activity Counters

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Solution Overview

Problem

Conventional wear-leveling techniques in flash memory lead to undesirable consecutive wear-leveling operations on certain blocks, causing unbalanced usage frequencies and potential performance deterioration due to garbage collection, as they fail to prevent successive wear-leveling effectively.

Innovation Solution

A method for a memory controller that determines operation counts for each block, including erase operations and wear-leveling counts, to prevent successive wear-leveling by setting a reference value and adjusting these counts accordingly, ensuring uniform usage and selecting alternative blocks for wear-leveling when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If wear-leveling is frequently performed to maintain uniform erase counts across blocks, then the lifespan of flash memory is extended, but successive wear-leveling operations are performed on the same block causing unbalanced usage frequencies

Engineering Contradiction:
Improvelifespan of flash memoryVSAvoiduniformity of usage frequencies across blocks
Core Design Contradiction:
Duration of action of stationary objectVSStability of the object's composition

Solution Approach 1:

The patent introduces a wear-leveling prevention counter that is updated in advance before wear-leveling operations are executed. This counter tracks the number of times wear-leveling has been performed on each block and uses this information to prevent successive wear-leveling operations on the same block, thereby avoiding unbalanced usage frequencies while maintaining the lifespan extension benefit

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the wear-leveling prevention counter is updated based on the results of previous wear-leveling operations. The controller reads the counter value, determines whether to perform wear-leveling on a block, and then updates the counter accordingly. This closed-loop feedback ensures that wear-leveling operations are distributed uniformly across blocks while still extending flash memory lifespan

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If wear-leveling operations are performed to balance erase counts, then block usage uniformity is improved, but garbage collection occurs due to unbalance of available blocks among banks

Engineering Contradiction:
Improveuniformity of block usageVSAvoiddata storage device performance
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent updates the wear-leveling prevention counter in advance before wear-leveling operations are executed. This preliminary update ensures that when wear-leveling is performed, blocks are selected in a way that maintains balance among banks, preventing the unbalance that would otherwise trigger garbage collection and performance deterioration

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller uses feedback from the wear-leveling prevention counter to make informed decisions about which blocks to subject to wear-leveling. By reading the counter values and selecting blocks accordingly, the controller maintains uniform distribution of wear-leveling operations across banks, preventing garbage collection and preserving device performance

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9864526B2Wear leveling using multiple activity counters
Publication Date: 2018.01.09 SAMSUNG ELECTRONICS CO LTD
  • US9864526B2 patent drawing
  • US9864526B2 patent drawing
  • US9864526B2 patent drawing

AI summary

A method of operating a memory controller which controls a non-volatile memory including a plurality of blocks is provided. The method includes determining an operation count for a first block among the plurality of blocks and avoiding successive wear-leveling on the first block based on the determined operation count thereof.