Flash Memory Wear Leveling via Cycle-Aware Block Assignment
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Solution Overview
Problem
Users face difficulties in selecting the appropriate wear leveling mode for flash memory systems, leading to uneven program-erase cycles among physical blocks, which can result in premature wear and reduced memory lifespan.
Innovation Solution
A memory controller that dynamically adjusts the assignment of logical blocks to physical blocks based on their program-erase cycles, transferring data from blocks with high cycles to those with lower cycles to maintain even wear, thereby reducing the overall program-erase cycle count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wear leveling mode is selected by user, then wear leveling can be applied, but user cannot easily select appropriate mode considering data ratio
Solution Approach 1:
The memory controller automatically performs wear leveling operations without requiring user intervention. The controller monitors program-erase cycle counts of physical blocks and autonomously determines when and where to transfer data, replacing the manual mode selection process with self-service automation.
Solution Approach 2:
The patent changes the operational parameters of wear leveling dynamically based on monitored conditions. Instead of fixed modes, the controller adjusts data transfer timing and target block selection based on real-time program-erase cycle counts, transforming static mode selection into dynamic parameter adjustment.
2Reliability
If dynamic wear leveling is applied, then program-erase cycles are evened out among dynamic blocks, but program-erase cycles of blocks without static data increase noticeably
Solution Approach 1:
The patent applies different wear leveling strategies to different types of physical blocks based on their data characteristics. Static physical blocks receive static wear leveling treatment while dynamic physical blocks receive dynamic wear leveling treatment, allowing localized optimization rather than uniform application.
Solution Approach 2:
The patent segments physical blocks into static and dynamic categories based on data characteristics. This segmentation allows the system to apply appropriate wear leveling methods to each segment, preventing the indiscriminate data transfers that would otherwise increase program-erase cycles unnecessarily.
3Reliability
If static wear leveling is applied, then program-erase cycles are evened out including static blocks, but useless data transferring is often performed between physical blocks
Solution Approach 1:
The patent introduces dynamic decision-making into the wear leveling process. The controller continuously monitors program-erase cycle counts and dynamically determines whether data transfer is necessary based on current block states, replacing static wear leveling's unconditional transfers with dynamic, condition-based transfers.
Solution Approach 2:
The patent implements feedback control by monitoring program-erase cycle counts of physical blocks and using this information to determine subsequent data transfer operations. The system continuously adjusts its behavior based on feedback from the monitored state, preventing useless transfers by only acting when program-erase cycle imbalance exceeds thresholds.
Data Source
AI summary
In the control of the number of program-erase cycles, when assigning a logical block (LB) to a physical block (PB), the number of program-erase cycles of a first PB and that of a second PB are compared, which first PB is a free PB of which the number of program-erase cycles is the smallest among that of free PBs, which second PB is a PB earliest assigned a LB among PBs each assigned a LB. As a result, in a case where the number of program-erase cycles of the first PB is larger by a predetermined value or more than that of the second PB, data stored in the second PB are transferred to a free PB of which the number of program-erase cycles is the largest among free PBs, and then the LB is assigned to the second PB.